[PATCH 3/6] phy: qcom: qmp-pcie: Add X1P42100 Gen4x4 PHY

[Manivannan Sadhasivam]

On January 25, 2025 11:00:23 PM GMT+05:30, Dmitry Baryshkov <dmitry.baryshkov at linaro.org> wrote:
>On Sat, Jan 25, 2025 at 04:31:19AM +0100, Konrad Dybcio wrote:
>> From: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
>> 
>> Add a new, common configuration for Gen4x4 V6 PHYs without an init
>> sequence.
>> 
>> The bootloader configures the hardware once and the OS retains that
>> configuration by using the NOCSR reset line (which doesn't drop
>> register state on assert) in place of the "full reset" one.
>
>I know your opinion, but my 2c would still be for not depending on the
>bootloader. I think that was the rule for ages for many possible
>reasons.
>

But if Linux or other OS can trust the bootloader, then it makes perfect sense to rely on them. Obviously, the question here is that on which platforms this level of trust should be established. And the answer I got was starting from the compute platforms (atleast X1E).

So let's take it on an experimental basis and see how it goes? If at all any problem arises, we can always resort to in kernel sequences.

- Mani

>> 
>> Use this new configuration for X1P42100's Gen4x4 PHY.
>> 
>> Signed-off-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
>> ---
>>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>

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