[PATCH 2/2] arm64: dts: qcom: sa8775p: Set max link speed to Gen4 for PCIe EP

Konrad Dybcio konrad.dybcio at oss.qualcomm.com
Wed Apr 23 04:23:47 PDT 2025


On 4/23/25 1:15 PM, Mrinmay Sarkar wrote:
> The maximum link speed was previously restricted to Gen3 due to
> the absence of Gen4 equalization support in the driver.
> 
> Add this change to set the maximum link speed to Gen4, as Gen4
> equalization support has now been added into the driver.
> 
> Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar at oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 5bd0c03476b143444543c68cd1c1d475c3302555..65d9433a298f80eb782439120ad9c3c74025b441 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -6462,7 +6462,7 @@ pcie0_ep: pcie-ep at 1c00000 {
>  		power-domains = <&gcc PCIE_0_GDSC>;
>  		phys = <&pcie0_phy>;
>  		phy-names = "pciephy";
> -		max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
> +		max-link-speed = <4>;

The property may now be removed, as 4 is the value read out from
the hardware

Konrad



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