[PATCH 0/2] Update PCIe PHY settings for SA8775P

Mrinmay Sarkar mrinmay.sarkar at oss.qualcomm.com
Wed Apr 23 04:15:42 PDT 2025


This Series is to update PCIe PHY settings as per latest
hardware programming guide and update max link speed to
gen4 for SA8775P PCIe EP

Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar at oss.qualcomm.com>
---
Mrinmay Sarkar (2):
      phy: qcom: qmp-pcie: Update PHY settings for SA8775P
      arm64: dts: qcom: sa8775p: Set max link speed to Gen4 for PCIe EP

 arch/arm64/boot/dts/qcom/sa8775p.dtsi              |  4 +-
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 89 ++++++++++++----------
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h |  2 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5_20.h      |  4 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v5.h | 11 +++
 drivers/phy/qualcomm/phy-qcom-qmp.h                |  1 +
 6 files changed, 68 insertions(+), 43 deletions(-)
---
base-commit: 2c9c612abeb38aab0e87d48496de6fd6daafb00b
change-id: 20250423-update_phy-0f2fef2aa075

Best regards,
-- 
Mrinmay Sarkar <mrinmay.sarkar at oss.qualcomm.com>




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