[PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC

[Qiang Yu]

On 10/18/2024 10:06 PM, Johan Hovold wrote:
> Please use a more concise subject (e.g. try to stay within 72 chars)
> than:
>
> 	PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC
>
> Here you could drop "SoC", maybe "ASPM" and "config" for example.
>
> On Wed, Oct 16, 2024 at 08:04:11PM -0700, Qiang Yu wrote:
>> Currently, the cfg_1_9_0 which is being used for X1E80100 has config_sid
>> callback in its ops and doesn't disable ASPM L0s. However, as same as
>> SC8280X, PCIe controllers on X1E80100 are connected to SMMUv3, hence don't
>> need config_sid() callback and hardware team has recommended to disable
>> L0s as it is broken in the controller. Hence reuse cfg_sc8280xp for
>> X1E80100.
> Since the x1e80100 dtsi, like sc8280xp, do not specify an iommu-map,
> that bit is effectively just a cleanup and all this patch does is to
> disable L0s.
>
> Please rephrase to make this clear. This will also allow you to make the
> Subject even shorter (no need to mention the SID bit in Subject).
>
> Also say something about how L0s is broken so that it is more clear what
> the effect of this patch is. On sc8280xp enabling L0s lead to
> correctable errors for example.
Need more time to confirm the exact reason about disabling L0s.
Will update if get any progress

Thanks,
Qiang
>
>> Fixes: 6d0c39324c5f ("PCI: qcom: Add X1E80100 PCIe support")
>> Cc: stable at vger.kernel.org
> Johan