[PATCH v2 0/5] Add support for primary USB controller on QCS615

[Krishna Kurapati]

This series aims at enabling USB on QCS615 which has 2 USB controllers.
The primary controller is SuperSpeed capable and secondary one is
High Speed only capable. The High Speed Phy is a QUSB2 phy and the
SuperSpeed Phy is a QMP Uni Phy which supports non-concurrent DP.

Device tree patches will sent separately after the SMMU node is acked [1]
on upstream. DT Binding checks done on the binding patches.

Bindings have been added only for the first controller.
Kept the ACKs as is obtained from v1.

[1]: https://lore.kernel.org/all/20241011063112.19087-1-quic_qqzhou@quicinc.com/

Gave only a compile test on v2 as there are no code changes
that can affect the functionality.

Changes in v2:
Addressed comments in v1 by using lowercase for reg values.
Removed explicitly setting of struct params to false (as they are
already false).

Link to v1:
https://lore.kernel.org/all/20241014084432.3310114-1-quic_kriskura@quicinc.com/

Krishna Kurapati (5):
  dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindings
  dt-bindings: phy: qcom,qusb2: Add bindings for QCS615
  dt-bindings: phy: qcom,msm8998-qmp-usb3-phy: Add support for QCS615
  phy: qcom-qusb2: Add support for QCS615
  phy: qcom: qmp-usbc: Add qmp configuration for QCS615

 .../phy/qcom,msm8998-qmp-usb3-phy.yaml        |  2 ++
 .../bindings/phy/qcom,qusb2-phy.yaml          |  1 +
 .../devicetree/bindings/usb/qcom,dwc3.yaml    |  3 +++
 drivers/phy/qualcomm/phy-qcom-qmp-usbc.c      |  3 +++
 drivers/phy/qualcomm/phy-qcom-qusb2.c         | 27 +++++++++++++++++++
 5 files changed, 36 insertions(+)

-- 
2.34.1