Aw: Re: [PATCH 4/4] phy: Realtek Otto Serdes: add devicetree documentation

[Markus Stockhausen]

> ...
> > + The primary serdes register memory location. Other SerDes control and
> > + management registers are distributed all over the I/O memory space and
> > + identified by the driver automatically.
> > +
> > + controlled-ports:
> > + description: |
> > + A bit mask defining the ports that are actively controlled by the driver. In
> > + case a bit is not set the driver will only process read operations on the
> > + SerDes. If not set the driver will run all ports in read only mode.
>
> You have never tested it.

Maybe I left the wrong impression. I'm currently very hard trying to get this driver
working on 4 different SoCs. The only environment I can do this porperly is an OpenWrt
toolchain and a lot of patches. With other bits in place I can even start a Zyxel
GS1920 (RTL839x) through serial console, setup the SerDes and activate the attached
Realtek PHYs.

https://github.com/openwrt/openwrt/pull/16577
https://github.com/openwrt/openwrt/pull/16123

An older DT from last weekend:

https://github.com/openwrt/openwrt/pull/16123/commits/716b01afd35fcc708c0204ca237d8541a8000ffa

> > +
> > + "#phy-cells":
> > + const: 4
> > + description: |
> > + The first number defines the SerDes to use. The second number a linked
> > + SerDes. E.g. if a octa 1G PHY is attached to two QSGMII SerDes. The third
> > + number is the first switch port this SerDes is working for, the fourth number
> > + is the last switch port the SerDes is working for.
> > +
> > + cmd-setup:
> > + description: |
> > + A field of 16 bit values that contain a patch/command sequence to run on the
> > + SerDes registers during driver setup.
>
> None of these fields match DT. Drop all of driver related stuff.

Hm, what would be the best way to run magic vendor patch sequences that setup
registers and do not pollute driver?

Best regards.

Markus