[PATCH v2 2/6] phy: qcom: qmp: Add phy register and clk setting for QCS615 PCIe
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Fri Nov 22 01:21:06 PST 2024
On Fri, Nov 22, 2024 at 10:33:10AM +0800, Ziyue Zhang wrote:
> From: Krishna chaitanya chundru <quic_krichai at quicinc.com>
>
> Add support for GEN3 x1 PCIe PHY found on Qualcomm QCS615 platform.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai at quicinc.com>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan at quicinc.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 105 +++++++++++++++++++++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h | 1 +
> 2 files changed, 106 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
--
With best wishes
Dmitry
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