[PATCH v2 2/2] phy: rockchip: Add Samsung CSI/DSI Combo DCPHY driver

Heiko Stübner heiko at sntech.de
Wed Nov 13 04:39:30 PST 2024


Hi,

> > +static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung)
> > +{
> > +	u32 bias_con2 = 0x3223;
> > +
> > +	regmap_write(samsung->regmap, BIAS_CON0, 0x0010);
> > +	regmap_write(samsung->regmap, BIAS_CON1, 0x0110);
> > +	regmap_write(samsung->regmap, BIAS_CON2, bias_con2);
> > +
> > +	/* default output voltage select:
> > +	 * dphy: 400mv
> > +	 * cphy: 530mv
> > +	 */
> > +	regmap_update_bits(samsung->regmap, BIAS_CON4,
> > +			   I_MUX_SEL_MASK, I_MUX_SEL_400MV);
> > +}
> > +
> > +static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung)
> > +{
> > +}
> 
> uhm? :)

When there was still the CSI stuff in here, that function still had
content ;-) .

But yeah, if and when that comes back, we can re-add things.


> > +static int samsung_mipi_dcphy_set_mode(struct phy *phy, enum phy_mode mode,
> > +				       int submode)
> > +{
> > +	return 0;
> > +}
> 
> You can just remove this. phy_set_mode_ext() will return 0 byself if
> the callback is NULL.

But it will not set the mode then.

See the part of
	ret = phy->ops->set_mode(phy, mode, submode);
	if (!ret)
		phy->attrs.mode = mode;

Without the set_mode callback phy->attrs.mode will not be set.
And while we don't have anything to do for set_mode itself,
we do need the mipi_dphy mode to be set.


Heiko





More information about the linux-phy mailing list