[PATCH v2 1/4] dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
Lorenzo Bianconi
lorenzo at kernel.org
Thu May 16 03:56:12 PDT 2024
> Il 15/05/24 12:44, Lorenzo Bianconi ha scritto:
> > Introduce device-tree binding documentation for Airoha EN7581 PCIe PHY
> > driver.
> >
> > Tested-by: Zhengping Zhang <zhengping.zhang at airoha.com>
> > Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
> > ---
> > .../bindings/phy/airoha,en7581-pcie-phy.yaml | 55 +++++++++++++++++++
> > 1 file changed, 55 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml
> > new file mode 100644
> > index 000000000000..4ab04b501129
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml
> > @@ -0,0 +1,55 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/airoha,en7581-pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha EN7581 PCI-Express PHY
> > +
> > +maintainers:
> > + - Lorenzo Bianconi <lorenzo at kernel.org>
> > +
> > +description:
> > + The PCIe PHY supports physical layer functionality for PCIe Gen2/Gen3 port.
> > +
> > +properties:
> > + compatible:
> > + const: airoha,en7581-pcie-phy
> > +
> > + reg:
> > + maxItems: 3
>
> If you have a description for the registers, I'd appreciate seeing that list.
> If you don't, and can't retrieve a description, it's still fine, but please
> try if you can.
ack, I will fix it.
>
> > +
> > + reg-names:
> > + items:
> > + - const: csr_2l
>
> Can we please avoid underscores?
sure, I will fix it.
Regards,
Lorenzo
>
> Please change this to "csr-2l", after which:
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
>
> > + - const: pma0
> > + - const: pma1
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - "#phy-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/phy/phy.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + phy at 11e80000 {
> > + compatible = "airoha,en7581-pcie-phy";
> > + #phy-cells = <0>;
> > + reg = <0x0 0x1fa5a000 0x0 0xfff>,
> > + <0x0 0x1fa5b000 0x0 0xfff>,
> > + <0x0 0x1fa5c000 0x0 0xfff>;
> > + reg-names = "csr_2l", "pma0", "pma1";
> > + };
> > + };
>
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