[PATCH V4 0/4] Add support for PCIe PHY in IPQ9574

[devi priya]

This series adds support for a single-lane and two-lane PCIe PHYs
found on Qualcomm IPQ9574 platform.

[V4]
	Picked up the R-b/A-b tags.
	Split the phy driver and headers to individual patches.
[V3]
	https://lore.kernel.org/linux-arm-msm/20240512082541.1805335-1-quic_devipriy@quicinc.com/
[V2]
	https://lore.kernel.org/linux-arm-msm/20230519085723.15601-1-quic_devipriy@quicinc.com/
[V1]
	https://lore.kernel.org/linux-arm-msm/20230421124150.21190-1-quic_devipriy@quicinc.com/

devi priya (4):
  dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ9574 QMP PCIe
    PHYs
  phy: qcom-qmp: Add missing offsets for Qserdes PLL registers.
  phy: qcom-qmp: Add missing register definitions for PCS V5
  phy: qcom-qmp-pcie: Add support for IPQ9574 g3x1 and g3x2 PCIEs

 .../phy/qcom,ipq8074-qmp-pcie-phy.yaml        |   2 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      | 309 ++++++++++++++++++
 .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h   |  14 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-pll.h   |   3 +
 4 files changed, 328 insertions(+)

-- 
2.34.1