[PATCH 1/3] dt-bindings: phy: add YAML schema for cv1800-usb-phy driver bindings

[Inochi Amaoto]

On Mon, Jul 08, 2024 at 12:08:28PM GMT, Yao Zi wrote:
> cv1800-usb-phy driver supports USB 2.0 phys integrated in Sophgo
> Cv1800/SG200x SoCs. Add YAML schema for its binding.
> 
> Signed-off-by: Yao Zi <ziyao at disroot.org>
> ---
>  .../bindings/phy/sophgo,cv1800-usb-phy.yaml   | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml
> new file mode 100644
> index 000000000000..0403d899e23b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2019 BayLibre, SAS
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo CV1800 USB PHY
> +
> +maintainers:
> +  - Yao Zi <ziyao at disroot.org>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - sophgo,cv1800-usb-phy
> +
> +  reg:
> +    maxItems: 2
> +
> +  reg-names:
> +    items:
> +      - const: phy
> +      - const: pin

drop pin, cv1800 series does not support this.

> +
> +  clocks:
> +    maxItems: 4
> +
> +  clock-names:
> +    items:
> +      - const: apb
> +      - const: 125m
> +      - const: 33k
> +      - const: 12m
> +
> +  "#phy-cells":
> +    const: 0
> +
> +  dr_role:
> +    enum:
> +      - host
> +      - device

cv181x series have otg support. For board with OTG,
it should be properly handled.

> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - clocks
> +  - clock-names
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/sophgo,cv1800.h>
> +    usb_phy: usb-phy at 3006000 {
> +        compatible = "sophgo,cv1800-usb-phy";
> +        reg = <0x300600 0x60>, <0x3000048 0x4>;
> +        reg-names = "phy", "pin";
> +        clocks = <&clk CLK_APB_USB>,
> +                 <&clk CLK_USB_125M>,
> +                 <&clk CLK_USB_33K>,
> +                 <&clk CLK_USB_12M>;
> +        clock-names = "apb", "125m", "33k", "12m";
> +        #phy-cells = <0>;
> +    };
> -- 
> 2.45.2
> 

You patch is duplicated, I have sumbitted patches 
month ago and still needs some time to figure out 
the best topology. Phy driver belongs to syscon,
which make things kind of complex.

https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/#t

Regards,
Inochi