[PATCH 13/14] arm64: dts: qcom: sm8650: Drop PCIE_AUX_CLK from pcie_phy node
neil.armstrong at linaro.org
neil.armstrong at linaro.org
Wed Jan 24 04:34:01 PST 2024
On 24/01/2024 08:36, Manivannan Sadhasivam wrote:
> PCIe PHY hw doesn't require PCIE_AUX_CLK for functioning. This clock is
> only required by the PCIe controller. Hence drop it from pcie_phy node.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 2df77123a8c7..b31e60599891 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -2276,13 +2276,11 @@ pcie0_phy: phy at 1c06000 {
> compatible = "qcom,sm8650-qmp-gen3x2-pcie-phy";
> reg = <0 0x01c06000 0 0x2000>;
>
> - clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
> - <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> + clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> <&tcsr TCSR_PCIE_0_CLKREF_EN>,
> <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>,
> <&gcc GCC_PCIE_0_PIPE_CLK>;
> - clock-names = "aux",
> - "cfg_ahb",
> + clock-names = "cfg_ahb",
> "ref",
> "rchng",
> "pipe";
>
Tested-by: Neil Armstrong <neil.armstrong at linaro.org> # on SM8650-QRD
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