On 20.12.2024 6:52 AM, Ziyue Zhang wrote: > Add configurations in devicetree for PCIe0, including registers, clocks, > interrupts and phy setting sequence. > > Signed-off-by: Ziyue Zhang <quic_ziyuzhan at quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com> Konrad