[PATCH v1 0/1] phy: freescale: imx8m-pcie: facing pcie link-up instability

[Vinod Koul]

On 07-04-24, 22:22, Marcel Ziswiler wrote:
> Hi Vinod
> 
> On Sat, 2024-04-06 at 14:48 +0530, Vinod Koul wrote:
> > 
> > On Fri, 22 Mar 2024 14:06:31 +0100, Marcel Ziswiler wrote:
> > > In our automated testing setup, we use Delock Mini-PCIe SATA cards [1].
> > > While this setup has proven very stable overall we noticed upstream on
> > > the i.MX8M Mini fails quite regularly (about 50/50) to bring up the PCIe
> > > link while with NXP's downstream BSP 5.15.71_2.2.2 it always works. As
> > > that old downstream stuff was quite different, I first also tried NXP's
> > > latest downstream BSP 6.1.55_2.2.0 which from a PCIe point of view is
> > > fairly vanilla, however, also there the PCIe link-up was not stable.
> > > Comparing and debugging I noticed that upstream explicitly configures
> > > the AUX_PLL_REFCLK_SEL to I_PLL_REFCLK_FROM_SYSPLL while working
> > > downstream [2] leaving it at reset defaults of AUX_IN (PLL clock).
> > > Unfortunately, the TRM does not mention any further details about this
> > > register (both for the i.MX 8M Mini as well as the Plus). Maybe somebody
> > > from NXP could further comment on this?
> > > 
> > > [...]
> > 
> > Applied, thanks!
> > 
> > [1/1] phy: freescale: imx8m-pcie: fix pcie link-up instability
> >       commit: 3a161017f1de55cc48be81f6156004c151f32677
> 
> Sorry, but it is slightly confusing whether v1 or v2 now got applied. I believe v1 but then only the commit
> messages differ. However, please note that only v2 included information on how to proceed concerning
> backporting to stable 6.1.x.

V2 was picked, you can check phy tree

Somehow b4 sent email for v1 as well

-- 
~Vinod