[PATCH v2 08/13] arm64: dts: qcom: sc8180x: switch PCIe QMP PHY to new style of bindings

[Konrad Dybcio]

On 31.07.2023 12:57, Dmitry Baryshkov wrote:
> Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc8180x.dtsi | 140 ++++++++++----------------
>  1 file changed, 51 insertions(+), 89 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> index 486f7ffef43b..fae149e33b98 100644
> --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> @@ -1749,7 +1749,7 @@ pcie0: pci at 1c00000 {
>  					<&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>;
>  			interconnect-names = "pcie-mem", "cpu-pcie";
>  
> -			phys = <&pcie0_lane>;
> +			phys = <&pcie0_phy>;
>  			phy-names = "pciephy";
>  
>  			status = "disabled";
> @@ -1757,15 +1757,20 @@ pcie0: pci at 1c00000 {
>  
>  		pcie0_phy: phy-wrapper at 1c06000 {
>  			compatible = "qcom,sc8180x-qmp-pcie-phy";
> -			reg = <0 0x1c06000 0 0x1c0>;
> -			#address-cells = <2>;
> -			#size-cells = <2>;
> -			ranges;
> +			reg = <0 0x1c06000 0 0x1000>;
Please pad reg to 8 hex digits, here and below since you're already
touching this

Konrad