[PATCH v4 2/6] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy
Varadarajan Narayanan
quic_varada at quicinc.com
Wed Jul 12 04:38:19 PDT 2023
Document the M31 USB2 phy present in IPQ5332.
Signed-off-by: Sricharan Ramabadhran <quic_srichara at quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
---
v4:
Move M31 URL to description
Remove maxItems and relevant content from clock-names
Change node name to generic name
'make dt_binding_check DT_SCHEMA_FILES=qcom' passed
v3:
Incorporate review comments. Will bring in ipq5018 compatible
string while posting ipq5018 usb patchset.
v1:
Rename qcom,m31.yaml -> qcom,ipq5332-usb-hsphy.yaml
Drop default binding "m31,usb-hsphy"
Add clock
Remove 'oneOf' from compatible
Remove 'qscratch' region from register space as it is not needed
Remove reset-names
Fix the example definition
---
.../bindings/phy/qcom,ipq5332-usb-hsphy.yaml | 48 ++++++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
new file mode 100644
index 0000000..eea90ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: M31 USB PHY
+
+maintainers:
+ - Sricharan Ramabadhran <quic_srichara at quicinc.com>
+ - Varadarajan Narayanan <quic_varada at quicinc.org>
+
+description:
+ USB M31 PHY (https://www.m31tech.com) found in Qualcomm
+ IPQ5018, IPQ5332 SoCs.
+
+properties:
+ compatible:
+ enum:
+ - qcom,ipq5332-usb-hsphy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: cfg_ahb
+
+ resets:
+ maxItems: 1
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
+ usbphy0: usb-phy at 7b000 {
+ compatible = "qcom,ipq5332-usb-hsphy";
+ reg = <0x0007b000 0x12c>;
+
+ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
+ clock-names = "cfg_ahb";
+
+ resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+ };
--
2.7.4
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