[PATCH v3 1/8] dt-bindings: phy: Add qcom,snps-eusb2-phy schema file
Rob Herring
robh at kernel.org
Fri Jan 27 13:19:44 PST 2023
On Thu, Jan 26, 2023 at 03:14:08PM +0200, Abel Vesa wrote:
> The SM8550 SoC uses Synopsis eUSB2 PHY. Add a dt-binding schema
> for the new driver.
>
> Signed-off-by: Abel Vesa <abel.vesa at linaro.org>
> ---
>
> The v2 version of this patch was here:
> https://lore.kernel.org/all/20230126124651.1362533-2-abel.vesa@linaro.org/
>
> Changes since v2:
> * none
>
> Changes since v1:
> * dropped the "ref src" clock
> * dropped the usb-repeater property
>
> .../bindings/phy/qcom,snps-eusb2-phy.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
> new file mode 100644
> index 000000000000..49a5dad486c2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
Remove blank line
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
Drop quotes
> +
> +title: Qualcomm SNPS eUSB2 phy controller
> +
> +maintainers:
> + - Abel Vesa <abel.vesa at linaro.org>
> +
> +description:
> + eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
> +
> +properties:
> + compatible:
> + const: qcom,sm8550-snps-eusb2-phy
> +
> + reg:
> + maxItems: 1
> +
> + "#phy-cells":
> + const: 0
> +
> + clocks:
> + items:
> + - description: ref
> +
> + clock-names:
> + items:
> + - const: ref
> +
> + resets:
> + maxItems: 1
> + description:
> + Phandle to reset to phy block.
Drop description.
> +
> + vdd-supply:
> + description:
> + Phandle to 0.88V regulator supply to PHY digital circuit.
> +
> + vdda12-supply:
> + description:
> + Phandle to 1.2V regulator supply to PHY refclk pll block.
> +
> +required:
> + - compatible
> + - reg
> + - "#phy-cells"
> + - clocks
> + - clock-names
> + - vdd-supply
> + - vdda12-supply
> + - resets
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-sm8550.h>
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/clock/qcom,tcsrcc-sm8550.h>
> +
> + usb_1_hsphy: phy at 88e3000 {
> + compatible = "qcom,sm8550-snps-eusb2-phy";
> + reg = <0x88e3000 0x154>;
> + #phy-cells = <0>;
> +
> + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>,
> + <&tcsrcc TCSR_USB2_CLKREF_EN>;
> + clock-names = "ref_src", "ref";
Doesn't match the schema.
> +
> + vdd-supply = <&vreg_l1e_0p88>;
> + vdda12-supply = <&vreg_l3e_1p2>;
> +
> + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> + };
> --
> 2.34.1
>
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