[PATCH v9 06/10] arm64: dts: ls1046a: Add serdes bindings
Sean Anderson
sean.anderson at seco.com
Thu Jan 26 08:43:26 PST 2023
On 1/25/23 18:46, Shawn Guo wrote:
> On Thu, Dec 29, 2022 at 07:01:35PM -0500, Sean Anderson wrote:
>> This adds bindings for the SerDes devices. They are disabled by default
>
> s/bindings/descriptions?
>
> The term "bindings" generally means the schema/doc in
> Documentation/devicetree/bindings/.
How about "nodes"?
--Sean
> Shawn
>
>> to prevent any breakage on existing boards.
>>
>> Signed-off-by: Sean Anderson <sean.anderson at seco.com>
>> ---
>>
>> (no changes since v4)
>>
>> Changes in v4:
>> - Convert to new bindings
>>
>> Changes in v3:
>> - Describe modes in device tree
>>
>> Changes in v2:
>> - Use one phy cell for SerDes1, since no lanes can be grouped
>> - Disable SerDes by default to prevent breaking boards inadvertently.
>>
>> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 ++++++++++++++++++
>> 1 file changed, 18 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> index a01e3cfec77f..12adccd5caae 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> @@ -424,6 +424,24 @@ sfp: efuse at 1e80000 {
>> clock-names = "sfp";
>> };
>>
>> + serdes1: serdes at 1ea0000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + #clock-cells = <1>;
>> + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
>> + reg = <0x0 0x1ea0000 0x0 0x2000>;
>> + status = "disabled";
>> + };
>> +
>> + serdes2: serdes at 1eb0000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + #clock-cells = <1>;
>> + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
>> + reg = <0x0 0x1eb0000 0x0 0x2000>;
>> + status = "disabled";
>> + };
>> +
>> dcfg: dcfg at 1ee0000 {
>> compatible = "fsl,ls1046a-dcfg", "syscon";
>> reg = <0x0 0x1ee0000 0x0 0x1000>;
>> --
>> 2.35.1.1320.gc452695387.dirty
>>
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