[PATCH v2 16/16] arm64: dts: qcom: sm8550: Fix UFS PHY clocks
Can Guo
quic_cang at quicinc.com
Tue Dec 19 19:56:09 PST 2023
On 12/18/2023 8:07 PM, Manivannan Sadhasivam wrote:
> QMP PHY used in SM8550 requires 3 clocks:
>
> * ref - 19.2MHz reference clock from RPMh
> * ref_aux - Auxiliary reference clock from GCC
> * qref - QREF clock from TCSR
>
> Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index baa8540868a4..386ffd0d72c4 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -1891,9 +1891,12 @@ crypto: crypto at 1dfa000 {
> ufs_mem_phy: phy at 1d80000 {
> compatible = "qcom,sm8550-qmp-ufs-phy";
> reg = <0x0 0x01d80000 0x0 0x2000>;
> - clocks = <&tcsr TCSR_UFS_CLKREF_EN>,
> - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
> - clock-names = "ref", "ref_aux";
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> + <&tcsr TCSR_UFS_CLKREF_EN>;
> + clock-names = "ref",
> + "ref_aux",
> + "qref";
>
> power-domains = <&gcc UFS_MEM_PHY_GDSC>;
>
Reviewed-by: Can Guo <quic_cang at quicinc.com>
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