[PATCH] phy: qcom-qmp-usb: correct registers layout for IPQ8074 USB3 PHY

[Kathiravan Thirumoorthy]

On 9/30/2022 12:30 AM, Dmitry Baryshkov wrote:
> According to the kernel 4.4 sources from NHSS.QSDK.9.0.2 and according
> to hardware docs, the PHY registers layout used for IPQ8074 USB3 PHY is
> incorrect. This platform uses offset 0x174 for the PCS_STATUS register,
> 0xd8 for PCS_AUTONOMOUS_MODE_CTRL, etc.
>
> Correct the PHY registers layout.
>
> Fixes: 94a407cc17a4 ("phy: qcom-qmp: create copies of QMP PHY driver")
> Fixes: 507156f5a99f ("phy: qcom-qmp: Add USB QMP PHY support for IPQ8074")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> index b84c0d4b5754..c3e7a860582b 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> @@ -1616,7 +1616,7 @@ static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
>   	.num_resets		= ARRAY_SIZE(msm8996_usb3phy_reset_l),
>   	.vreg_list		= qmp_phy_vreg_l,
>   	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
> -	.regs			= usb3phy_regs_layout,
> +	.regs			= qmp_v3_usb3phy_regs_layout,
>   
>   	.start_ctrl		= SERDES_START | PCS_START,
>   	.pwrdn_ctrl		= SW_PWRDN,

Reviewed the docs, changes looks good to me.

Reviewed-by: Kathiravan T<quic_kathirav at quicinc.com>