[PATCH v6 1/5] phy: qcom-qmp-pcie: split register tables into common and extra parts
Johan Hovold
johan at kernel.org
Tue Sep 27 02:45:40 PDT 2022
On Tue, Sep 27, 2022 at 12:22:02PM +0300, Dmitry Baryshkov wrote:
> SM8250 configuration tables are split into two parts: the common one and
> the PHY-specific tables. Make this split more formal. Rather than having
> a blind renamed copy of all QMP table fields, add separate struct
> qmp_phy_cfg_tables and add two instances of this structure to the struct
> qmp_phy_cfg. Later on this will be used to support different PHY modes
> (RC vs EP).
>
> Reviewed-by: Johan Hovold <johan+linaro at kernel.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> +static void qmp_pcie_pcs_init(struct qmp_phy *qphy, const struct qmp_phy_cfg_tables *tables)
> +{
> + const struct qmp_phy_cfg *cfg = qphy->cfg;
> + void __iomem *pcs = qphy->pcs;
> + void __iomem *pcs_misc = qphy->pcs_misc;
> +
> + if (!tables)
> + return;
> +
> + qmp_pcie_configure(pcs, cfg->regs,
> + tables->pcs, tables->pcs_num);
> + qmp_pcie_configure(pcs_misc, cfg->regs,
> + tables->pcs_misc, tables->pcs_misc_num);
nit: You missed the above unnecessary line breaks.
Johan
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