[PATCH v5 0/5] PCI: qcom: Support using the same PHY for both RC and EP

[Lorenzo Pieralisi]

On Mon, Sep 26, 2022 at 08:34:30PM +0300, Dmitry Baryshkov wrote:
> Programming of QMP PCIe PHYs slightly differs between RC and EP modes.
> 
> Currently both qcom and qcom-ep PCIe controllers setup the PHY in the
> default mode, making it impossible to select at runtime whether the PHY
> should be running in RC or in EP modes. Usually this is not an issue,
> since for most devices only the RC mode is used. Some devices (SDX55)
> currently support only the EP mode without supporting the RC mode (at
> this moment).
> 
> Nevertheless some of the Qualcomm platforms (e.g. the aforementioned
> SDX55) would still benefit from being able to switch between RC and EP
> depending on the driver being used. While it is possible to use
> different compat strings for the PHY depending on the mode, it seems
> like an incorrect approach, since the PHY doesn't differ between
> usecases. It's the PCIe controller, who should decide how to configure
> the PHY.
> 
> This patch series implements the ability to select between RC and EP
> modes, by allowing the PCIe QMP PHY driver to switch between
> programming tables.
> 
> This patchseries depends on the header from the pre-6.1 phy/next. Thus
> after the 6.1 the PCIe patches can be applied independently of the PHY
> part.

I assume then it is better for me to ACK the PCI patches so
that they can be pulled into the PHY tree, right ?

Lorenzo

> Changes since v4:
> - Fixed the possible oops in probe (Johan)
> - Renamed the tables struct and individual table fields (Johan)
> - Squashed the 'separate funtions' patch to lower the possible
>   confusion.
> 
> Changes since v3:
> - Rebased on top of phy/next to pick in newly defined
>   PHY_MODE_PCIE_RC/EP.
> - Renamed 'main' to 'common' and 'secondary' to 'extra' to reflect the
>   intention of the split (the 'common' tables and the 'extra for the ...
>   mode' tables).
> - Merged the 'pointer' patch into first and second patches to make them
>   more obvious.
> 
> Changes since v2:
> - Added PHY_SUBMODE_PCIE_RC/EP defines (Vinod),
> - Changed `primary' table name to `main', added extra comments
>   describing that `secondary' are the additional tables, not required in
>   most of the cases (following the suggestion by Johan to rename
>   `primary' table),
> - Changed secondary tables into the pointers to stop wasting extra
>   memory (Vinod),
> - Split several functions for programming the PHY using these tables.
> 
> Changes since v1:
> - Split the if(table) removal to the separate patch
> - Expanded commit messages and comments to provide additional details
> - Fixed build error on pcie-qcom.c
> - Added support for EP mode on sm8450 to demonstrate the usage of this
>   patchset
> 
> Changes since RFC:
> - Fixed the compilation of PCIe EP driver,
> - Changed pri/sec names to primary and secondary,
> - Added comments regarding usage of secondary_rc/_ep fields.
> 
> Dmitry Baryshkov (5):
>   phy: qcom-qmp-pcie: split register tables into common and extra parts
>   phy: qcom-qmp-pcie: support separate tables for EP mode
>   phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in EP mode
>   PCI: qcom: Setup PHY to work in RC mode
>   PCI: qcom-ep: Setup PHY to work in EP mode
> 
>  drivers/pci/controller/dwc/pcie-qcom-ep.c     |   5 +
>  drivers/pci/controller/dwc/pcie-qcom.c        |   5 +
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      | 523 +++++++++++-------
>  .../qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h    |   1 +
>  4 files changed, 335 insertions(+), 199 deletions(-)
> 
> -- 
> 2.35.1
>