[PATCH v7 4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY

[Konrad Dybcio]

On 10/11/2022 16:17, Dmitry Baryshkov wrote:
> Remove manually created symbol clocks and replace them with clocks
> provided by PHY.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
Maybe it would be worth exporting some #defines for these incides so 
that it's less likely for the next person referencing these DTs to make 
a mistake, but that could be done in a separate patch. Something similar 
could probably be useful for DSI BYTE/PIXEL clk


Reviewed-by: Konrad Dybcio <konrad.dybcio at linaro.org>

Konrad
>   arch/arm64/boot/dts/qcom/msm8996.dtsi |  5 ++++-
>   arch/arm64/boot/dts/qcom/sm8350.dtsi  | 25 ++++---------------------
>   arch/arm64/boot/dts/qcom/sm8450.dtsi  | 15 +++++++++++++--
>   3 files changed, 21 insertions(+), 24 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index c0a2baffa49d..935ba6e6bc15 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -699,7 +699,9 @@ gcc: clock-controller at 300000 {
>   				 <&pciephy_1>,
>   				 <&pciephy_2>,
>   				 <&ssusb_phy_0>,
> -				 <0>, <0>, <0>;
> +				 <&ufsphy_lane 0>,
> +				 <&ufsphy_lane 1>,
> +				 <&ufsphy_lane 2>;
>   			clock-names = "cxo",
>   				      "cxo2",
>   				      "sleep_clk",
> @@ -2019,6 +2021,7 @@ ufsphy_lane: phy at 627400 {
>   				reg = <0x627400 0x12c>,
>   				      <0x627600 0x200>,
>   				      <0x627c00 0x1b4>;
> +				#clock-cells = <1>;
>   				#phy-cells = <0>;
>   			};
>   		};
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 90a26f406bf3..51ca006dc5c1 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -37,24 +37,6 @@ sleep_clk: sleep-clk {
>   			clock-frequency = <32000>;
>   			#clock-cells = <0>;
>   		};
> -
> -		ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 {
> -			compatible = "fixed-clock";
> -			clock-frequency = <1000>;
> -			#clock-cells = <0>;
> -		};
> -
> -		ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 {
> -			compatible = "fixed-clock";
> -			clock-frequency = <1000>;
> -			#clock-cells = <0>;
> -		};
> -
> -		ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 {
> -			compatible = "fixed-clock";
> -			clock-frequency = <1000>;
> -			#clock-cells = <0>;
> -		};
>   	};
>   
>   	cpus {
> @@ -661,9 +643,9 @@ gcc: clock-controller at 100000 {
>   				 <0>,
>   				 <0>,
>   				 <0>,
> -				 <&ufs_phy_rx_symbol_0_clk>,
> -				 <&ufs_phy_rx_symbol_1_clk>,
> -				 <&ufs_phy_tx_symbol_0_clk>,
> +				 <&ufs_mem_phy_lanes 0>,
> +				 <&ufs_mem_phy_lanes 1>,
> +				 <&ufs_mem_phy_lanes 2>,
>   				 <0>,
>   				 <0>;
>   		};
> @@ -2389,6 +2371,7 @@ ufs_mem_phy_lanes: phy at 1d87400 {
>   				      <0 0x01d87c00 0 0x1dc>,
>   				      <0 0x01d87800 0 0x108>,
>   				      <0 0x01d87a00 0 0x1e0>;
> +				#clock-cells = <1>;
>   				#phy-cells = <0>;
>   			};
>   		};
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index efb01fefe9c7..95c01391972a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -722,11 +722,21 @@ gcc: clock-controller at 100000 {
>   			clocks = <&rpmhcc RPMH_CXO_CLK>,
>   				 <&sleep_clk>,
>   				 <&pcie0_lane>,
> -				 <&pcie1_lane>;
> +				 <&pcie1_lane>,
> +				 <0>,
> +				 <&ufs_mem_phy_lanes 0>,
> +				 <&ufs_mem_phy_lanes 1>,
> +				 <&ufs_mem_phy_lanes 2>,
> +				 <0>;
>   			clock-names = "bi_tcxo",
>   				      "sleep_clk",
>   				      "pcie_0_pipe_clk",
> -				      "pcie_1_pipe_clk";
> +				      "pcie_1_pipe_clk",
> +				      "pcie_1_phy_aux_clk",
> +				      "ufs_phy_rx_symbol_0_clk",
> +				      "ufs_phy_rx_symbol_1_clk",
> +				      "ufs_phy_tx_symbol_0_clk",
> +				      "usb3_phy_wrapper_gcc_usb30_pipe_clk";
>   		};
>   
>   		gpi_dma2: dma-controller at 800000 {
> @@ -3166,6 +3176,7 @@ ufs_mem_phy_lanes: phy at 1d87400 {
>   				      <0 0x01d87c00 0 0x1dc>,
>   				      <0 0x01d87800 0 0x108>,
>   				      <0 0x01d87a00 0 0x1e0>;
> +				#clock-cells = <1>;
>   				#phy-cells = <0>;
>   			};
>   		};