[PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings

[Camelia Alexandra Groza]

> -----Original Message-----
> From: Sean Anderson <sean.anderson at seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem at davemloft.net>; Jakub Kicinski
> <kuba at kernel.org>; Madalin Bucur <madalin.bucur at nxp.com>;
> netdev at vger.kernel.org
> Cc: Paolo Abeni <pabeni at redhat.com>; Eric Dumazet
> <edumazet at google.com>; linux-arm-kernel at lists.infradead.org; Russell
> King <linux at armlinux.org.uk>; linux-kernel at vger.kernel.org; Sean Anderson
> <sean.anderson at seco.com>; Kishon Vijay Abraham I <kishon at ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Leo Li
> <leoyang.li at nxp.com>; Rob Herring <robh+dt at kernel.org>; Shawn Guo
> <shawnguo at kernel.org>; Vinod Koul <vkoul at kernel.org>;
> devicetree at vger.kernel.org; linux-phy at lists.infradead.org
> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
> 
> This adds appropriate bindings for the macs which use the SerDes. The
> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> no driver for this device (and as far as I know all you can do with the
> 100MHz clocks is gate them), so I have chosen to model it as a single
> fixed clock.
> 
> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> This means that Lane A (what the driver thinks is lane 0) uses pins
> SD1_TX3_P/N.
> 
> Because this will break ethernet if the serdes is not enabled, enable
> the serdes driver by default on Layerscape.
> 
> Signed-off-by: Sean Anderson <sean.anderson at seco.com>
> ---
> Please let me know if there is a better/more specific config I can use
> here.
> 
> (no changes since v1)

My LS1046ARDB hangs at boot with this patch right after the second SerDes is probed,
right before the point where the PCI host bridge is registered. I can get around this
either by disabling the second SerDes node from the device tree, or disabling
CONFIG_PCI_LAYERSCAPE at build.

I haven't debugged it more but there seems to be an issue here.

>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts    | 34 +++++++++++++++++++
>  drivers/phy/freescale/Kconfig                 |  1 +
>  2 files changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> index 7025aad8ae89..4f4dd0ed8c53 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> @@ -26,6 +26,32 @@ aliases {
>  	chosen {
>  		stdout-path = "serial0:115200n8";
>  	};
> +
> +	clocks {
> +		clk_100mhz: clock-100mhz {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <100000000>;
> +		};
> +
> +		clk_156mhz: clock-156mhz {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <156250000>;
> +		};
> +	};
> +};
> +
> +&serdes1 {
> +	clocks = <&clk_100mhz>, <&clk_156mhz>;
> +	clock-names = "ref0", "ref1";
> +	status = "okay";
> +};
> +
> +&serdes2 {
> +	clocks = <&clk_100mhz>, <&clk_100mhz>;
> +	clock-names = "ref0", "ref1";
> +	status = "okay";
>  };
> 
>  &duart0 {
> @@ -140,21 +166,29 @@ ethernet at e6000 {
>  	ethernet at e8000 {
>  		phy-handle = <&sgmii_phy1>;
>  		phy-connection-type = "sgmii";
> +		phys = <&serdes1 1>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet at ea000 {
>  		phy-handle = <&sgmii_phy2>;
>  		phy-connection-type = "sgmii";
> +		phys = <&serdes1 0>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet at f0000 { /* 10GEC1 */
>  		phy-handle = <&aqr106_phy>;
>  		phy-connection-type = "xgmii";
> +		phys = <&serdes1 3>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet at f2000 { /* 10GEC2 */
>  		fixed-link = <0 1 1000 0 0>;
>  		phy-connection-type = "xgmii";
> +		phys = <&serdes1 2>;
> +		phy-names = "serdes";
>  	};
> 
>  	mdio at fc000 {
> diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
> index fe2a3efe0ba4..9595666213d0 100644
> --- a/drivers/phy/freescale/Kconfig
> +++ b/drivers/phy/freescale/Kconfig
> @@ -43,6 +43,7 @@ config PHY_FSL_LYNX_10G
>  	tristate "Freescale Layerscale Lynx 10G SerDes support"
>  	select GENERIC_PHY
>  	select REGMAP_MMIO
> +	default y if ARCH_LAYERSCAPE
>  	help
>  	  This adds support for the Lynx "SerDes" devices found on various
> QorIQ
>  	  SoCs. There may be up to four SerDes devices on each SoC, and
> each
> --
> 2.35.1.1320.gc452695387.dirty