[RFC PATCH 0/4] PCI: qcom: support using the same PHY for both RC and EP

[Dmitry Baryshkov]

On Thu, 21 Jul 2022 at 13:15, Manivannan Sadhasivam
<manivannan.sadhasivam at linaro.org> wrote:
>
> On Tue, Jul 19, 2022 at 11:06:22PM +0300, Dmitry Baryshkov wrote:
> > Programming of QMP PCIe PHYs slightly differs between RC and EP modes.
> >
> > Currently both qcom and qcom-ep PCIe controllers setup the PHY in the
> > default mode, making it impossible to select at runtime whether the PHY
> > should be running in RC or in EP modes. Usually this is not an issue,
> > since for most devices only the RC mode is used, while for some (SDX55)
> > the EP mode is used without support for working as the RC.
> >
>
> SDX55 could work in RC mode also. Support is on the way.
>
> > Some of the Qualcomm platforms would still benefit from being able to
> > switch between RC and EP depending on the driver being used. While it is
> > possible to use different compat strings for the PHY depending on the
> > mode, it seems like an incorrect approach, since the PHY doesn't differ
> > between usecases. It's the PCIe controller, who should decide how to
> > configure the PHY.
> >
> > This patch series implements the ability to select between RC and EP
> > modes, by allowing the PCIe QMP PHY driver to switch between
> > programming tables.
> >
>
> This is really nice! On the case of SDX55, there is a single PHY and PCIe
> controller that is being used as both RC and EP depending on the usecase. While
> it makes sense to use a different PCIe node based on usecase, it does not for
> the PHY. So the runtime switch is a neat way of handling the differences.
>
> I've provided my review for the patches. But for the next iteration, you could
> remove the RFC tag.

Thanks for the review!

> Also, please mention the dependency of the series in the cover letter if any.
> Like this one depends on your previous PHY cleanup series. It will help
> maintainers while picking the patches.

Ack. However the PHY series are already part of phy/next, thus I
omitted mentioning them.

>
> Thanks a lot for the series!
>
> Regards,
> Mani
>
> > Dmitry Baryshkov (4):
> >   phy: qcom-qmp-pcie: split register tables into primary and secondary
> >     part
> >   phy: qcom-qmp-pcie: suppor separate tables for EP mode
> >   PCI: qcom: call phy_set_mode_ext()
> >   PCI: qcom-ep: call phy_set_mode_ext()
> >
> >  drivers/pci/controller/dwc/pcie-qcom-ep.c |   4 +
> >  drivers/pci/controller/dwc/pcie-qcom.c    |   4 +
> >  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c  | 155 ++++++++++++----------
> >  3 files changed, 96 insertions(+), 67 deletions(-)
> >
> > --
> > 2.35.1
> >
>
> --
> மணிவண்ணன் சதாசிவம்

-- 
With best wishes
Dmitry