[PATCH v3 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy

[Wangseok Lee]

On 05/07/2022 19:59, Krzysztof Kozlowski wrote:
> On 29/06/2022 09:18, Wangseok Lee wrote:
>> Just a gentle ping for this patch, if any concern on this patch please let me know.
>> 
> 
> You received comments to fix in this patch. Exactly four. Four important
> points to fix. Therefore what is this ping about?
> 
> Without fixing these items, your patch cannot be accepted. What is more
> to ping here?
> 
> Best regards,
> Krzysztof

I tried to receive your opinion about the fix point .
I will request a review again after modifying it in the next patch.

Thank you.

>>> +
>>> +  clocks:
>>> +    items:
>>> +      - description: PCIe PHY reference clock
> 
> refer to sample-schema.yaml, even if the clock item is single,
> it seems to be used as follows.
> 
> clocks:
>   maxItems: 1
> 
> clock-names:
>   items:
>     - const: ref
> 
> If only "clocks:" are define and clock-names are not define,
> the following warning occurs.
> "'clock-names' does not match any of the regexes"
> 
>>> +
>>> +  lcpll-ref-clk:
>>> +    const: 1
>> 
>> Unknown field... custom properties need vendor (axis,), type (boolean)
>> and description.
>> 
> 
> "lcpl-ref-clk" has an enum type value, so i will modify it as below.
> 
> 
> axis,lcpll-ref-clk:
>   description:
>     select the reference clock of phy and initialization is performed
>     with the reference clock according to the selected value.
>   $ref: /schemas/types.yaml#/definitions/uint32
>   enum: [ 0, 1, 2, 3, 4 ]
>