[PATCH v5 1/4] dt-bindings: phy: convert rockchip-usb-phy.txt to YAML

[Rob Herring]

On Wed, May 12, 2021 at 02:23:43PM +0200, Johan Jonker wrote:
> Current dts files with Rockchip 'usbphy' nodes are manually verified.
> In order to automate this process rockchip-usb-phy.txt has to be
> converted to YAML.
> 
> Add "#phy-cells", because it is a required property
> by phy-provider.yaml

Maybe we should relax that. Or changing the node name would solve it. 

> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
> ---
>  .../devicetree/bindings/phy/rockchip-usb-phy.txt   | 52 -------------
>  .../devicetree/bindings/phy/rockchip-usb-phy.yaml  | 86 ++++++++++++++++++++++
>  2 files changed, 86 insertions(+), 52 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
>  create mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
> deleted file mode 100644
> index 4ed569046..000000000
> --- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
> +++ /dev/null
> @@ -1,52 +0,0 @@
> -ROCKCHIP USB2 PHY
> -
> -Required properties:
> - - compatible: matching the soc type, one of
> -     "rockchip,rk3066a-usb-phy"
> -     "rockchip,rk3188-usb-phy"
> -     "rockchip,rk3288-usb-phy"
> - - #address-cells: should be 1
> - - #size-cells: should be 0
> -
> -Deprecated properties:
> - - rockchip,grf : phandle to the syscon managing the "general
> -   register files" - phy should be a child of the GRF instead
> -
> -Sub-nodes:
> -Each PHY should be represented as a sub-node.
> -
> -Sub-nodes
> -required properties:
> -- #phy-cells: should be 0
> -- reg: PHY configure reg address offset in GRF
> -		"0x320" - for PHY attach to OTG controller
> -		"0x334" - for PHY attach to HOST0 controller
> -		"0x348" - for PHY attach to HOST1 controller
> -
> -Optional Properties:
> -- clocks : phandle + clock specifier for the phy clocks
> -- clock-names: string, clock name, must be "phyclk"
> -- #clock-cells: for users of the phy-pll, should be 0
> -- reset-names: Only allow the following entries:
> - - phy-reset
> -- resets: Must contain an entry for each entry in reset-names.
> -- vbus-supply: power-supply phandle for vbus power source
> -
> -Example:
> -
> -grf: syscon at ff770000 {
> -	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
> -
> -...
> -
> -	usbphy: phy {
> -		compatible = "rockchip,rk3288-usb-phy";
> -		#address-cells = <1>;
> -		#size-cells = <0>;
> -
> -		usbphy0: usb-phy0 {
> -			#phy-cells = <0>;
> -			reg = <0x320>;
> -		};
> -	};
> -};
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml
> new file mode 100644
> index 000000000..3b6b39da0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml
> @@ -0,0 +1,86 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/rockchip-usb-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip USB2.0 phy
> +
> +maintainers:
> +  - Heiko Stuebner <heiko at sntech.de>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: rockchip,rk3288-usb-phy
> +      - items:
> +          - enum:
> +              - rockchip,rk3066a-usb-phy
> +              - rockchip,rk3188-usb-phy
> +          - const: rockchip,rk3288-usb-phy
> +
> +  "#phy-cells":
> +    const: 0

If we did add this, we'd want it to be 1 so we could identify which phy.

> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - "#phy-cells"
> +  - "#address-cells"
> +  - "#size-cells"
> +
> +additionalProperties: false
> +
> +patternProperties:
> +  "usb-phy@[0-9a-f]+$":
> +    type: object
> +
> +    properties:
> +      reg:
> +        maxItems: 1
> +
> +      "#phy-cells":
> +        const: 0
> +
> +      clocks:
> +        maxItems: 1
> +
> +      clock-names:
> +        const: phyclk
> +
> +      "#clock-cells":
> +        const: 0
> +
> +      resets:
> +        maxItems: 1
> +
> +      reset-names:
> +        const: phy-reset
> +
> +      vbus-supply:
> +        description: phandle for vbus power source
> +
> +    required:
> +      - reg
> +      - "#phy-cells"
> +
> +    additionalProperties: false
> +
> +examples:
> +  - |
> +    usbphy: usbphy {
> +      compatible = "rockchip,rk3288-usb-phy";
> +      #phy-cells = <0>;
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      usbphy0: usb-phy at 320 {
> +        reg = <0x320>;
> +        #phy-cells = <0>;
> +      };
> +    };
> -- 
> 2.11.0
>