From gnomes at lxorguk.ukuu.org.uk  Mon Mar  2 03:57:25 2015
From: gnomes at lxorguk.ukuu.org.uk (One Thousand Gnomes)
Date: Mon, 2 Mar 2015 11:57:25 +0000
Subject: 4.0-rc1: Oops on eject of CF card in PCMCIA slot
In-Reply-To: <20150227230852.GA21721@amd>
References: <20150227230852.GA21721@amd>
Message-ID: <20150302115725.53baae2f@lxorguk.ukuu.org.uk>

On Sat, 28 Feb 2015 00:08:52 +0100
Pavel Machek <pavel at ucw.cz> wrote:

> Hi!
> 
> It seems that pcmcia was unhappy even before, but eject definitely
> oopsed it.
> 
> Any ideas?

Probably a PCMCIA not a block layer change - well I guess could be
either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
pure PCI boxes so it didn't do various bad things.

Can you tweak drivers/pcmcia/Kconfig for config YENTA and make

        select PCCARD_PCI if PCMCIA !=n && !ISA   

instead do

	select PCCARD_NONSTATIC if PCMCIA !=n && !ISA

rebuild and re-test

The tracel looks like a block layer bug, but it would be nice to know if
its one that PCMCIA used it hide, or its in fact potentially something
else.

Do you have any other I/O port based PCMCIA device you can insert/eject
in that machine ?

Alan


From pavel at ucw.cz  Mon Mar  9 13:57:01 2015
From: pavel at ucw.cz (Pavel Machek)
Date: Mon, 9 Mar 2015 21:57:01 +0100
Subject: 4.0-rc1: Oops on eject of CF card in PCMCIA slot
In-Reply-To: <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
References: <20150227230852.GA21721@amd>
 <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
Message-ID: <20150309205701.GA11115@amd>

Hi!

On Mon 2015-03-02 11:57:25, One Thousand Gnomes wrote:
> On Sat, 28 Feb 2015 00:08:52 +0100
> Pavel Machek <pavel at ucw.cz> wrote:
> 
> > Hi!
> > 
> > It seems that pcmcia was unhappy even before, but eject definitely
> > oopsed it.

I meant "the dmesg indicated 'interesting stuff'".

> > Any ideas?
> 
> Probably a PCMCIA not a block layer change - well I guess could be
> either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> pure PCI boxes so it didn't do various bad things.

Unfortunately, it happened just once :-(. I'll scream if it happens
again.

> Do you have any other I/O port based PCMCIA device you can insert/eject
> in that machine ?

I should have cf bluetooth somewhere, but I doubt I can find it...
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


From pavel at ucw.cz  Mon Mar  9 14:18:54 2015
From: pavel at ucw.cz (Pavel Machek)
Date: Mon, 9 Mar 2015 22:18:54 +0100
Subject: 4.0-rc1: Oops on eject of CF card in PCMCIA slot
Message-ID: <20150309211854.GA4190@amd>

On Mon 2015-03-09 21:57:01, Pavel Machek wrote:
> Hi!
> 
> On Mon 2015-03-02 11:57:25, One Thousand Gnomes wrote:
> > On Sat, 28 Feb 2015 00:08:52 +0100
> > Pavel Machek <pavel at ucw.cz> wrote:
> > 
> > > Hi!
> > > 
> > > It seems that pcmcia was unhappy even before, but eject definitely
> > > oopsed it.
> 
> I meant "the dmesg indicated 'interesting stuff'".
> 
> > > Any ideas?
> > 
> > Probably a PCMCIA not a block layer change - well I guess could be
> > either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> > pure PCI boxes so it didn't do various bad things.
> 
> Unfortunately, it happened just once :-(. I'll scream if it happens
> again.

I tried to reproduce it on 4.0, and failed. Now I got this on 3.18+something...


Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:CPU: 1 PID: 15120 Comm: umount Tainted: G        W
 3.18.0+ #407

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Hardware name: LENOVO 17097HU/17097HU, BIOS 7BETD8WW (2.19 )
 03/31/2011

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:task: ed988580 ti: c23b6000 task.ti: c23b6000

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Stack:

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Call Trace:

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Code: 98 54 a5 c4 68 78 06 bb c4 89 4d ec e8 92 a6 01 00 83 c4
 10 8b 4d ec e9 ec fe ff ff 8d b4 26 00 00 00 00 85 c0 74 1a 55 89 e5
 53 <f6> 40 20 01 89 c3 74 20 8d 43 1c f0 83 6b 1c 01 74 06 8b 5d fc

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:EIP: [<c427b658>] kobject_put+0x8/0x50 SS:ESP 0068:c23b7d64
 
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html



----- End forwarded message -----

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


From pavel at ucw.cz  Mon Mar  9 14:11:16 2015
From: pavel at ucw.cz (Pavel Machek)
Date: Mon, 9 Mar 2015 22:11:16 +0100
Subject: 4.0-rc1: Oops on eject of CF card in PCMCIA slot
In-Reply-To: <20150309205701.GA11115@amd>
References: <20150227230852.GA21721@amd>
 <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
 <20150309205701.GA11115@amd>
Message-ID: <20150309211116.GA15243@amd>

On Mon 2015-03-09 21:57:01, Pavel Machek wrote:
> Hi!
> 
> On Mon 2015-03-02 11:57:25, One Thousand Gnomes wrote:
> > On Sat, 28 Feb 2015 00:08:52 +0100
> > Pavel Machek <pavel at ucw.cz> wrote:
> > 
> > > Hi!
> > > 
> > > It seems that pcmcia was unhappy even before, but eject definitely
> > > oopsed it.
> 
> I meant "the dmesg indicated 'interesting stuff'".
> 
> > > Any ideas?
> > 
> > Probably a PCMCIA not a block layer change - well I guess could be
> > either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> > pure PCI boxes so it didn't do various bad things.
> 
> Unfortunately, it happened just once :-(. I'll scream if it happens
> again.

I tried to reproduce it on 4.0, and failed. Now I got this on 3.18+something...


Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:CPU: 1 PID: 15120 Comm: umount Tainted: G        W
 3.18.0+ #407

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Hardware name: LENOVO 17097HU/17097HU, BIOS 7BETD8WW (2.19 )
 03/31/2011

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:task: ed988580 ti: c23b6000 task.ti: c23b6000

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Stack:

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Call Trace:

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:Code: 98 54 a5 c4 68 78 06 bb c4 89 4d ec e8 92 a6 01 00 83 c4
 10 8b 4d ec e9 ec fe ff ff 8d b4 26 00 00 00 00 85 c0 74 1a 55 89 e5
 53 <f6> 40 20 01 89 c3 74 20 8d 43 1c f0 83 6b 1c 01 74 06 8b 5d fc

Message from syslogd at duo at Mar  9 22:09:24 ...
 kernel:EIP: [<c427b658>] kobject_put+0x8/0x50 SS:ESP 0068:c23b7d64
 
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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From pavel at ucw.cz  Tue Mar 10 04:48:14 2015
From: pavel at ucw.cz (Pavel Machek)
Date: Tue, 10 Mar 2015 12:48:14 +0100
Subject: 4.0-rc2+: PATA CF card not detected in PCMCIA slot
In-Reply-To: <20150227230852.GA21721@amd>
References: <20150227230852.GA21721@amd>
Message-ID: <20150310114814.GA3471@amd>

Hi!

> It seems that pcmcia was unhappy even before, but eject definitely
> oopsed it.

Aha, I was confused; the oops is with 3.18, not with 4.0. For 4.0,
pcmcia does not work at all:

[  617.062718] pcmcia_socket pcmcia_socket0: pccard: card ejected from slot 0
[  622.840108] pcmcia_socket pcmcia_socket0: pccard: PCMCIA card inserted into slot 0
pavel at duo:~$ zcat /proc/config.gz | grep PATA_PCMCIA
CONFIG_PATA_PCMCIA=y


									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


From pavel at ucw.cz  Tue Mar 10 13:31:58 2015
From: pavel at ucw.cz (Pavel Machek)
Date: Tue, 10 Mar 2015 21:31:58 +0100
Subject: [solution exits] no PCMCIA in 4.0-rc3
In-Reply-To: <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
References: <20150227230852.GA21721@amd>
 <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
Message-ID: <20150310203158.GA16375@amd>

On Mon 2015-03-02 11:57:25, One Thousand Gnomes wrote:
> On Sat, 28 Feb 2015 00:08:52 +0100
> Pavel Machek <pavel at ucw.cz> wrote:
> 
> > Hi!
> > 
> > It seems that pcmcia was unhappy even before, but eject definitely
> > oopsed it.
> > 
> > Any ideas?
> 
> Probably a PCMCIA not a block layer change - well I guess could be
> either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> pure PCI boxes so it didn't do various bad things.
> 
> Can you tweak drivers/pcmcia/Kconfig for config YENTA and make
> 
>         select PCCARD_PCI if PCMCIA !=n && !ISA   
> 
> instead do
> 
> 	select PCCARD_NONSTATIC if PCMCIA !=n && !ISA
> 
> rebuild and re-test

If I do that, it breaks compile. If I do that, and delete "config
PCCARD_PCI", it fixes PCMCIA. Thanks!

> The tracel looks like a block layer bug, but it would be nice to know if
> its one that PCMCIA used it hide, or its in fact potentially something
> else.

Yeah the trace was from 3.18. 4.0 is ok with this regard.

									Pavel

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


From gnomes at lxorguk.ukuu.org.uk  Tue Mar 10 14:56:13 2015
From: gnomes at lxorguk.ukuu.org.uk (One Thousand Gnomes)
Date: Tue, 10 Mar 2015 21:56:13 +0000
Subject: [solution exits] no PCMCIA in 4.0-rc3
In-Reply-To: <20150310203158.GA16375@amd>
References: <20150227230852.GA21721@amd>
 <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
 <20150310203158.GA16375@amd>
Message-ID: <20150310215613.3bf7913b@lxorguk.ukuu.org.uk>

On Tue, 10 Mar 2015 21:31:58 +0100
> > Probably a PCMCIA not a block layer change - well I guess could be
> > either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> > pure PCI boxes so it didn't do various bad things.
> > 
> > Can you tweak drivers/pcmcia/Kconfig for config YENTA and make
> > 
> >         select PCCARD_PCI if PCMCIA !=n && !ISA   
> > 
> > instead do
> > 
> > 	select PCCARD_NONSTATIC if PCMCIA !=n && !ISA
> > 
> > rebuild and re-test
> 
> If I do that, it breaks compile. If I do that, and delete "config
> PCCARD_PCI", it fixes PCMCIA. Thanks!

Greg - can you revert 

commit 02b03846bb2befc558bfd0665749d6bb26f4c2f1
Author: Alan Cox <alan at linux.intel.com>
Date:   Wed Dec 10 15:07:36 2014 +0000

    pcmcia: add a new resource manager for non ISA systems
    
    On a pure PCI platform we don't actually need all the complexity of
    the rsrc_nonstatic manager, in fact we can just work directly with
    the pci allocators and avoid all the complexity (and code bloat).
    
    Signed-off-by: Alan Cox <alan at linux.intel.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>


and the one on top of it

commit d885d4f3728f386034bb2f7a61b7f2054c49b2d4
Author: Arnd Bergmann <arnd at arndb.de>
Date:   Tue Jan 13 15:11:55 2015 +0100

    pcmcia: add missing include for new pci resource handler
    
    The recently added rsrc_pci.c file calls pci_bus_alloc_resource without
    including the header file that declares it, and that sometimes causes
    a build warning on ARM:
    
    drivers/pcmcia/rsrc_pci.c: In function 'find_io_region':
    drivers/pcmcia/rsrc_pci.c:40:2: error: implicit declaration of function 'pci_bus_alloc_resource' [-Werror=implicit-function-declaration]
    
    This adds the missing include statement.
    
    Signed-off-by: Arnd Bergmann <arnd at arndb.de>
    Fixes: 02b03846bb2be ("pcmcia: add a new resource manager for non ISA systems")
    Acked-by: Alan Cox <alan at linux.intel.com>
    Reported-by: Jim Davis <jim.epost at gmail.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>


as it seems there is a regression in there for some configuration of I/O
based devices. I'll take a look at it over the next couple of kernel
releases and see what is up then resubmit it with fixes.



From greg at kroah.com  Wed Mar 11 06:33:22 2015
From: greg at kroah.com (Greg KH)
Date: Wed, 11 Mar 2015 14:33:22 +0100
Subject: [solution exits] no PCMCIA in 4.0-rc3
In-Reply-To: <20150310215613.3bf7913b@lxorguk.ukuu.org.uk>
References: <20150227230852.GA21721@amd>
 <20150302115725.53baae2f@lxorguk.ukuu.org.uk>
 <20150310203158.GA16375@amd>
 <20150310215613.3bf7913b@lxorguk.ukuu.org.uk>
Message-ID: <20150311133322.GA16209@kroah.com>

On Tue, Mar 10, 2015 at 09:56:13PM +0000, One Thousand Gnomes wrote:
> On Tue, 10 Mar 2015 21:31:58 +0100
> > > Probably a PCMCIA not a block layer change - well I guess could be
> > > either. I fixed a pile of PCMCIA bugs and also reworked the allocator for
> > > pure PCI boxes so it didn't do various bad things.
> > > 
> > > Can you tweak drivers/pcmcia/Kconfig for config YENTA and make
> > > 
> > >         select PCCARD_PCI if PCMCIA !=n && !ISA   
> > > 
> > > instead do
> > > 
> > > 	select PCCARD_NONSTATIC if PCMCIA !=n && !ISA
> > > 
> > > rebuild and re-test
> > 
> > If I do that, it breaks compile. If I do that, and delete "config
> > PCCARD_PCI", it fixes PCMCIA. Thanks!
> 
> Greg - can you revert 
> 
> commit 02b03846bb2befc558bfd0665749d6bb26f4c2f1
> Author: Alan Cox <alan at linux.intel.com>
> Date:   Wed Dec 10 15:07:36 2014 +0000
> 
>     pcmcia: add a new resource manager for non ISA systems
>     
>     On a pure PCI platform we don't actually need all the complexity of
>     the rsrc_nonstatic manager, in fact we can just work directly with
>     the pci allocators and avoid all the complexity (and code bloat).
>     
>     Signed-off-by: Alan Cox <alan at linux.intel.com>
>     Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
> 
> 
> and the one on top of it
> 
> commit d885d4f3728f386034bb2f7a61b7f2054c49b2d4
> Author: Arnd Bergmann <arnd at arndb.de>
> Date:   Tue Jan 13 15:11:55 2015 +0100
> 
>     pcmcia: add missing include for new pci resource handler
>     
>     The recently added rsrc_pci.c file calls pci_bus_alloc_resource without
>     including the header file that declares it, and that sometimes causes
>     a build warning on ARM:
>     
>     drivers/pcmcia/rsrc_pci.c: In function 'find_io_region':
>     drivers/pcmcia/rsrc_pci.c:40:2: error: implicit declaration of function 'pci_bus_alloc_resource' [-Werror=implicit-function-declaration]
>     
>     This adds the missing include statement.
>     
>     Signed-off-by: Arnd Bergmann <arnd at arndb.de>
>     Fixes: 02b03846bb2be ("pcmcia: add a new resource manager for non ISA systems")
>     Acked-by: Alan Cox <alan at linux.intel.com>
>     Reported-by: Jim Davis <jim.epost at gmail.com>
>     Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
> 
> 
> as it seems there is a regression in there for some configuration of I/O
> based devices. I'll take a look at it over the next couple of kernel
> releases and see what is up then resubmit it with fixes.

Now reverted, thanks.

greg k-h


From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:38 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:38 +0100
Subject: [PATCH 02/10] ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-3-git-send-email-alexandre.belloni@free-electrons.com>

the AT91_MEMCTRL_* defines are only used by the pm code, move them to pm.h

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/include/mach/at91_ramc.h | 4 ----
 arch/arm/mach-at91/pm.h                     | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
index e4492b151fee..493bc486e858 100644
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -21,10 +21,6 @@ extern void __iomem *at91_ramc_base[];
 .extern at91_ramc_base
 #endif
 
-#define AT91_MEMCTRL_MC		0
-#define AT91_MEMCTRL_SDRAMC	1
-#define AT91_MEMCTRL_DDRSDR	2
-
 #include <soc/at91/at91rm9200_sdramc.h>
 #include <soc/at91/at91sam9_ddrsdr.h>
 #include <soc/at91/at91sam9_sdramc.h>
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3223967d3460..ecd875a91d52 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -15,6 +15,10 @@
 
 #include <mach/at91_ramc.h>
 
+#define AT91_MEMCTRL_MC		0
+#define AT91_MEMCTRL_SDRAMC	1
+#define AT91_MEMCTRL_DDRSDR	2
+
 #define	AT91_PM_MEMTYPE_MASK	0x0f
 
 #define	AT91_PM_MODE_OFFSET	4
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:36 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:36 +0100
Subject: [PATCH 00/10] ARM: at91 cleanups for 4.1 #2
Message-ID: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>

Hi,

This patch set finishes the clean up of the mach-at91 directory.

It fixed the remaining two drivers (at91_cf and pata_at91) so that they compile
in a multiplatform configuration.

Then it removes the uneeded headers.


Alexandre Belloni (9):
  ARM: at91/pm: move the standby functions to pm.c
  ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
  ata: at91: use syscon to configure the smc
  ARM: at91: drop sam9_smc.c
  ARM: at91: declare the at91rm9200 memory controller as a syscon
  pcmcia: at91_cf: Use syscon to configure the MC/smc
  ARM: at91/pm: use the atmel-mc syscon defines
  ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
  ARM: at91: remove at91rm9200_sdramc.h

Boris Brezillon (1):
  mfd: syscon: Add Atmel MC (Memory Controller) registers definition

 .../devicetree/bindings/arm/atmel-at91.txt         |   2 +-
 arch/arm/boot/dts/at91rm9200.dtsi                  |   2 +-
 arch/arm/mach-at91/Makefile                        |   5 -
 arch/arm/mach-at91/include/mach/at91_ramc.h        |  32 -----
 arch/arm/mach-at91/include/mach/at91rm9200_mc.h    | 116 -----------------
 arch/arm/mach-at91/include/mach/at91sam9_smc.h     |  98 --------------
 arch/arm/mach-at91/pm.c                            |  91 ++++++++++++-
 arch/arm/mach-at91/pm.h                            | 110 +++-------------
 arch/arm/mach-at91/pm_suspend.S                    |   3 +-
 arch/arm/mach-at91/sam9_smc.c                      | 136 -------------------
 arch/arm/mach-at91/sam9_smc.h                      |  11 --
 drivers/ata/Kconfig                                |   1 -
 drivers/ata/pata_at91.c                            |  92 ++++++++++---
 drivers/pcmcia/Kconfig                             |   1 -
 drivers/pcmcia/at91_cf.c                           |  25 ++--
 include/linux/mfd/syscon/atmel-mc.h                | 144 +++++++++++++++++++++
 include/soc/at91/at91rm9200_sdramc.h               |  63 ---------
 17 files changed, 339 insertions(+), 593 deletions(-)
 delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9_smc.h
 delete mode 100644 arch/arm/mach-at91/sam9_smc.c
 delete mode 100644 arch/arm/mach-at91/sam9_smc.h
 create mode 100644 include/linux/mfd/syscon/atmel-mc.h
 delete mode 100644 include/soc/at91/at91rm9200_sdramc.h

-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:39 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:39 +0100
Subject: [PATCH 03/10] ata: at91: use syscon to configure the smc
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-4-git-send-email-alexandre.belloni@free-electrons.com>

Use syscon/regmap to configure the smc. This allows to avoid using
at91sam9_smc.h and to compile the driver in a multiplatform configuration.

The driver will still not probe until the proper DT bindings are added.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 drivers/ata/Kconfig     |  1 -
 drivers/ata/pata_at91.c | 92 ++++++++++++++++++++++++++++++++++++++-----------
 2 files changed, 71 insertions(+), 22 deletions(-)

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 5f601553b9b0..a3a13605a9c4 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -835,7 +835,6 @@ config PATA_AT32
 config PATA_AT91
 	tristate "PATA support for AT91SAM9260"
 	depends on ARM && SOC_AT91SAM9
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables support for IDE devices on the Atmel AT91SAM9260 SoC.
 
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 9e85937d36a9..ace0a4de3449 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -24,11 +24,13 @@
 #include <linux/ata.h>
 #include <linux/clk.h>
 #include <linux/libata.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-smc.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
 #include <linux/platform_data/atmel.h>
+#include <linux/regmap.h>
 
-#include <mach/at91sam9_smc.h>
 #include <asm/gpio.h>
 
 #define DRV_NAME		"pata_at91"
@@ -57,6 +59,15 @@ struct smc_range {
 	int max;
 };
 
+struct regmap *smc;
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+} fields;
+
 /**
  * adjust_smc_value - adjust value for one of SMC registers.
  * @value: adjusted value
@@ -206,7 +217,6 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
 {
 	int ret = 0;
 	int use_iordy;
-	struct sam9_smc_config smc;
 	unsigned int t6z;         /* data tristate time in ns */
 	unsigned int cycle;       /* SMC Cycle width in MCK ticks */
 	unsigned int setup;       /* SMC Setup width in MCK ticks */
@@ -244,19 +254,21 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
 
 	dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
 
-	/* SMC Setup Register */
-	smc.nwe_setup = smc.nrd_setup = setup;
-	smc.ncs_write_setup = smc.ncs_read_setup = 0;
-	/* SMC Pulse Register */
-	smc.nwe_pulse = smc.nrd_pulse = pulse;
-	smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
-	/* SMC Cycle Register */
-	smc.write_cycle = smc.read_cycle = cycle;
-	/* SMC Mode Register*/
-	smc.tdf_cycles = tdf_cycles;
-	smc.mode = info->mode;
-
-	sam9_smc_configure(0, info->cs, &smc);
+	regmap_fields_write(fields.setup, info->cs,
+			    AT91SAM9_SMC_NRDSETUP(setup) |
+			    AT91SAM9_SMC_NWESETUP(setup) |
+			    AT91SAM9_SMC_NCS_NRDSETUP(0) |
+			    AT91SAM9_SMC_NCS_WRSETUP(0));
+	regmap_fields_write(fields.pulse, info->cs,
+			    AT91SAM9_SMC_NRDPULSE(pulse) |
+			    AT91SAM9_SMC_NWEPULSE(pulse) |
+			    AT91SAM9_SMC_NCS_NRDPULSE(cs_pulse) |
+			    AT91SAM9_SMC_NCS_WRPULSE(cs_pulse));
+	regmap_fields_write(fields.cycle, info->cs,
+			    AT91SAM9_SMC_NRDCYCLE(cycle) |
+			    AT91SAM9_SMC_NWECYCLE(cycle));
+	regmap_fields_write(fields.mode, info->cs, info->mode |
+			    AT91_SMC_TDF_(tdf_cycles));
 }
 
 static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -280,21 +292,21 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
 {
 	struct at91_ide_info *info = dev->link->ap->host->private_data;
 	unsigned int consumed;
+	unsigned int mode;
 	unsigned long flags;
-	struct sam9_smc_config smc;
 
 	local_irq_save(flags);
-	sam9_smc_read_mode(0, info->cs, &smc);
+	regmap_fields_read(fields.mode, info->cs, &mode);
 
 	/* set 16bit mode before writing data */
-	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
-	sam9_smc_write_mode(0, info->cs, &smc);
+	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
+			    AT91_SMC_DBW_16);
 
 	consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
 
 	/* restore 8bit mode after data is written */
-	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
-	sam9_smc_write_mode(0, info->cs, &smc);
+	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
+			    AT91_SMC_DBW_8);
 
 	local_irq_restore(flags);
 	return consumed;
@@ -312,6 +324,36 @@ static struct ata_port_operations pata_at91_port_ops = {
 	.cable_detect	= ata_cable_40wire,
 };
 
+static int at91sam9_smc_fields_init(struct device *dev)
+{
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	field.id_size = 8;
+	field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
+	fields.setup = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.setup))
+		return PTR_ERR(fields.setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
+	fields.pulse = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.pulse))
+		return PTR_ERR(fields.pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
+	fields.cycle = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.cycle))
+		return PTR_ERR(fields.cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
+	fields.mode = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.mode))
+		return PTR_ERR(fields.mode);
+
+	return 0;
+}
+
 static int pata_at91_probe(struct platform_device *pdev)
 {
 	struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
@@ -341,6 +383,14 @@ static int pata_at91_probe(struct platform_device *pdev)
 
 	irq = board->irq_pin;
 
+	smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");
+	if (IS_ERR(smc))
+		return PTR_ERR(smc);
+
+	ret = at91sam9_smc_fields_init(dev);
+	if (ret < 0)
+		return ret;
+
 	/* init ata host */
 
 	host = ata_host_alloc(dev, 1);
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:37 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:37 +0100
Subject: [PATCH 01/10] ARM: at91/pm: move the standby functions to pm.c
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-2-git-send-email-alexandre.belloni@free-electrons.com>

The standby functions are now only used in pm.c, move them there.

Also, they are not inlined as a pointer to those functions is passed to the
cpuidle driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/pm.c | 89 +++++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-at91/pm.h | 92 -------------------------------------------------
 2 files changed, 89 insertions(+), 92 deletions(-)

diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index f93a735ba327..5062699cbb12 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -222,6 +222,95 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
 		at91_cpuidle_device.dev.platform_data = at91_standby;
 }
 
+/*
+ * The AT91RM9200 goes into self-refresh mode with this command, and will
+ * terminate self-refresh automatically on the next SDRAM access.
+ *
+ * Self-refresh mode is exited as soon as a memory access is made, but we don't
+ * know for sure when that happens. However, we need to restore the low-power
+ * mode if it was enabled before going idle. Restoring low-power mode while
+ * still in self-refresh is "not recommended", but seems to work.
+ */
+static void at91rm9200_standby(void)
+{
+	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
+
+	asm volatile(
+		"b    1f\n\t"
+		".align    5\n\t"
+		"1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
+		"    str    %0, [%1, %2]\n\t"
+		"    str    %3, [%1, %4]\n\t"
+		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
+		"    str    %5, [%1, %2]"
+		:
+		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
+		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
+		  "r" (lpr));
+}
+
+/* We manage both DDRAM/SDRAM controllers, we need more than one value to
+ * remember.
+ */
+static void at91_ddr_standby(void)
+{
+	/* Those two values allow us to delay self-refresh activation
+	 * to the maximum. */
+	u32 lpr0, lpr1 = 0;
+	u32 saved_lpr0, saved_lpr1 = 0;
+
+	if (at91_ramc_base[1]) {
+		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
+		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
+		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
+	}
+
+	saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
+	lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
+	lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
+
+	/* self-refresh mode now */
+	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
+	if (at91_ramc_base[1])
+		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
+
+	cpu_do_idle();
+
+	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
+	if (at91_ramc_base[1])
+		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
+}
+
+/* We manage both DDRAM/SDRAM controllers, we need more than one value to
+ * remember.
+ */
+static void at91sam9_sdram_standby(void)
+{
+	u32 lpr0, lpr1 = 0;
+	u32 saved_lpr0, saved_lpr1 = 0;
+
+	if (at91_ramc_base[1]) {
+		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
+		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
+		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
+	}
+
+	saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
+	lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
+	lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
+
+	/* self-refresh mode now */
+	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
+	if (at91_ramc_base[1])
+		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
+
+	cpu_do_idle();
+
+	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
+	if (at91_ramc_base[1])
+		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
+}
+
 static const struct of_device_id ramc_ids[] __initconst = {
 	{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
 	{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index dcacfa1ad3fa..3223967d3460 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -23,96 +23,4 @@
 
 #define	AT91_PM_SLOW_CLOCK	0x01
 
-/*
- * The AT91RM9200 goes into self-refresh mode with this command, and will
- * terminate self-refresh automatically on the next SDRAM access.
- *
- * Self-refresh mode is exited as soon as a memory access is made, but we don't
- * know for sure when that happens. However, we need to restore the low-power
- * mode if it was enabled before going idle. Restoring low-power mode while
- * still in self-refresh is "not recommended", but seems to work.
- */
-
-#ifndef __ASSEMBLY__
-static inline void at91rm9200_standby(void)
-{
-	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
-
-	asm volatile(
-		"b    1f\n\t"
-		".align    5\n\t"
-		"1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
-		"    str    %0, [%1, %2]\n\t"
-		"    str    %3, [%1, %4]\n\t"
-		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
-		"    str    %5, [%1, %2]"
-		:
-		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
-		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
-		  "r" (lpr));
-}
-
-/* We manage both DDRAM/SDRAM controllers, we need more than one value to
- * remember.
- */
-static inline void at91_ddr_standby(void)
-{
-	/* Those two values allow us to delay self-refresh activation
-	 * to the maximum. */
-	u32 lpr0, lpr1 = 0;
-	u32 saved_lpr0, saved_lpr1 = 0;
-
-	if (at91_ramc_base[1]) {
-		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
-		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
-		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
-	}
-
-	saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
-	lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
-	lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
-
-	/* self-refresh mode now */
-	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
-	if (at91_ramc_base[1])
-		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
-
-	cpu_do_idle();
-
-	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
-	if (at91_ramc_base[1])
-		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
-}
-
-/* We manage both DDRAM/SDRAM controllers, we need more than one value to
- * remember.
- */
-static inline void at91sam9_sdram_standby(void)
-{
-	u32 lpr0, lpr1 = 0;
-	u32 saved_lpr0, saved_lpr1 = 0;
-
-	if (at91_ramc_base[1]) {
-		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
-		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
-		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
-	}
-
-	saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
-	lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
-	lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
-
-	/* self-refresh mode now */
-	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
-	if (at91_ramc_base[1])
-		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
-
-	cpu_do_idle();
-
-	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
-	if (at91_ramc_base[1])
-		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
-}
-
-#endif
 #endif
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:40 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:40 +0100
Subject: [PATCH 04/10] ARM: at91: drop sam9_smc.c
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-5-git-send-email-alexandre.belloni@free-electrons.com>

sam9_smc.c has no users anymore, remove it along with both sam9_smc.h and
mach/at91sam9_smc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/Makefile                    |   2 -
 arch/arm/mach-at91/include/mach/at91sam9_smc.h |  98 ------------------
 arch/arm/mach-at91/sam9_smc.c                  | 136 -------------------------
 arch/arm/mach-at91/sam9_smc.h                  |  11 --
 4 files changed, 247 deletions(-)
 delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9_smc.h
 delete mode 100644 arch/arm/mach-at91/sam9_smc.c
 delete mode 100644 arch/arm/mach-at91/sam9_smc.h

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 06a4cefd33a0..3586d977e99d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -6,8 +6,6 @@ asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
 
 obj-y		:= soc.o
 
-obj-$(CONFIG_SOC_AT91SAM9)	+= sam9_smc.o
-
 # CPU-specific support
 obj-$(CONFIG_SOC_AT91RM9200)	+= at91rm9200.o
 obj-$(CONFIG_SOC_AT91SAM9)	+= at91sam9.o
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
deleted file mode 100644
index ff54a0ce90e3..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9_smc.h
- *
- * Copyright (C) 2007 Andrew Victor
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Static Memory Controllers (SMC) - System peripherals registers.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9_SMC_H
-#define AT91SAM9_SMC_H
-
-#ifndef __ASSEMBLY__
-struct sam9_smc_config {
-	/* Setup register */
-	u8 ncs_read_setup;
-	u8 nrd_setup;
-	u8 ncs_write_setup;
-	u8 nwe_setup;
-
-	/* Pulse register */
-	u8 ncs_read_pulse;
-	u8 nrd_pulse;
-	u8 ncs_write_pulse;
-	u8 nwe_pulse;
-
-	/* Cycle register */
-	u16 read_cycle;
-	u16 write_cycle;
-
-	/* Mode register */
-	u32 mode;
-	u8 tdf_cycles:4;
-};
-
-extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
-#endif
-
-#define AT91_SMC_SETUP		0x00				/* Setup Register for CS n */
-#define		AT91_SMC_NWESETUP	(0x3f << 0)			/* NWE Setup Length */
-#define			AT91_SMC_NWESETUP_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRSETUP	(0x3f << 8)			/* NCS Setup Length in Write Access */
-#define			AT91_SMC_NCS_WRSETUP_(x)	((x) << 8)
-#define		AT91_SMC_NRDSETUP	(0x3f << 16)			/* NRD Setup Length */
-#define			AT91_SMC_NRDSETUP_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDSETUP	(0x3f << 24)			/* NCS Setup Length in Read Access */
-#define			AT91_SMC_NCS_RDSETUP_(x)	((x) << 24)
-
-#define AT91_SMC_PULSE		0x04				/* Pulse Register for CS n */
-#define		AT91_SMC_NWEPULSE	(0x7f <<  0)			/* NWE Pulse Length */
-#define			AT91_SMC_NWEPULSE_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRPULSE	(0x7f <<  8)			/* NCS Pulse Length in Write Access */
-#define			AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
-#define		AT91_SMC_NRDPULSE	(0x7f << 16)			/* NRD Pulse Length */
-#define			AT91_SMC_NRDPULSE_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDPULSE	(0x7f << 24)			/* NCS Pulse Length in Read Access */
-#define			AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
-
-#define AT91_SMC_CYCLE		0x08				/* Cycle Register for CS n */
-#define		AT91_SMC_NWECYCLE	(0x1ff << 0 )			/* Total Write Cycle Length */
-#define			AT91_SMC_NWECYCLE_(x)	((x) << 0)
-#define		AT91_SMC_NRDCYCLE	(0x1ff << 16)			/* Total Read Cycle Length */
-#define			AT91_SMC_NRDCYCLE_(x)	((x) << 16)
-
-#define AT91_SMC_MODE		0x0c				/* Mode Register for CS n */
-#define		AT91_SMC_READMODE	(1 <<  0)			/* Read Mode */
-#define		AT91_SMC_WRITEMODE	(1 <<  1)			/* Write Mode */
-#define		AT91_SMC_EXNWMODE	(3 <<  4)			/* NWAIT Mode */
-#define			AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
-#define			AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
-#define			AT91_SMC_EXNWMODE_READY		(3 << 4)
-#define		AT91_SMC_BAT		(1 <<  8)			/* Byte Access Type */
-#define			AT91_SMC_BAT_SELECT		(0 << 8)
-#define			AT91_SMC_BAT_WRITE		(1 << 8)
-#define		AT91_SMC_DBW		(3 << 12)			/* Data Bus Width */
-#define			AT91_SMC_DBW_8			(0 << 12)
-#define			AT91_SMC_DBW_16			(1 << 12)
-#define			AT91_SMC_DBW_32			(2 << 12)
-#define		AT91_SMC_TDF		(0xf << 16)			/* Data Float Time. */
-#define			AT91_SMC_TDF_(x)		((x) << 16)
-#define		AT91_SMC_TDFMODE	(1 << 20)			/* TDF Optimization - Enabled */
-#define		AT91_SMC_PMEN		(1 << 24)			/* Page Mode Enabled */
-#define		AT91_SMC_PS		(3 << 28)			/* Page Size */
-#define			AT91_SMC_PS_4			(0 << 28)
-#define			AT91_SMC_PS_8			(1 << 28)
-#define			AT91_SMC_PS_16			(2 << 28)
-#define			AT91_SMC_PS_32			(3 << 28)
-
-#endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
deleted file mode 100644
index 826315af6d11..000000000000
--- a/arch/arm/mach-at91/sam9_smc.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/sam9_smc.c
- *
- * Copyright (C) 2008 Andrew Victor
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#include <mach/at91sam9_smc.h>
-
-#include "sam9_smc.h"
-
-
-#define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x10))
-
-static void __iomem *smc_base_addr[2];
-
-static void sam9_smc_cs_write_mode(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	__raw_writel(config->mode
-		   | AT91_SMC_TDF_(config->tdf_cycles),
-		   base + AT91_SMC_MODE);
-}
-
-void sam9_smc_write_mode(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_write_mode);
-
-static void sam9_smc_cs_configure(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-
-	/* Setup register */
-	__raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
-		   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
-		   | AT91_SMC_NRDSETUP_(config->nrd_setup)
-		   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
-		   base + AT91_SMC_SETUP);
-
-	/* Pulse register */
-	__raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
-		   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
-		   | AT91_SMC_NRDPULSE_(config->nrd_pulse)
-		   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
-		   base + AT91_SMC_PULSE);
-
-	/* Cycle register */
-	__raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
-		   | AT91_SMC_NRDCYCLE_(config->read_cycle),
-		   base + AT91_SMC_CYCLE);
-
-	/* Mode register */
-	sam9_smc_cs_write_mode(base, config);
-}
-
-void sam9_smc_configure(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_configure);
-
-static void sam9_smc_cs_read_mode(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	u32 val = __raw_readl(base + AT91_SMC_MODE);
-
-	config->mode = (val & ~AT91_SMC_NWECYCLE);
-	config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
-}
-
-void sam9_smc_read_mode(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_read_mode);
-
-static void sam9_smc_cs_read(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	u32 val;
-
-	/* Setup register */
-	val = __raw_readl(base + AT91_SMC_SETUP);
-
-	config->nwe_setup = val & AT91_SMC_NWESETUP;
-	config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
-	config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
-	config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
-
-	/* Pulse register */
-	val = __raw_readl(base + AT91_SMC_PULSE);
-
-	config->nwe_pulse = val & AT91_SMC_NWEPULSE;
-	config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
-	config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
-	config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
-
-	/* Cycle register */
-	val = __raw_readl(base + AT91_SMC_CYCLE);
-
-	config->write_cycle = val & AT91_SMC_NWECYCLE;
-	config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
-
-	/* Mode register */
-	sam9_smc_cs_read_mode(base, config);
-}
-
-void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
-{
-	sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
-}
-
-void __init at91sam9_ioremap_smc(int id, u32 addr)
-{
-	if (id > 1) {
-		pr_warn("%s: id > 2\n", __func__);
-		return;
-	}
-	smc_base_addr[id] = ioremap(addr, 512);
-	if (!smc_base_addr[id])
-		pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
-}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
deleted file mode 100644
index 3e52dcd4a59f..000000000000
--- a/arch/arm/mach-at91/sam9_smc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/sam9_smc.
- *
- * Copyright (C) 2008 Andrew Victor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-extern void __init at91sam9_ioremap_smc(int id, u32 addr);
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:42 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:42 +0100
Subject: [PATCH 06/10] ARM: at91: declare the at91rm9200 memory controller as
 a syscon
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-7-git-send-email-alexandre.belloni@free-electrons.com>

The at91rm9200 memory controller is not simply an SDRAM controller. It also
controls the EBI (External Bus Interface), the SMC (Static Memory Controller)and
the Burst Flash Controller.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 Documentation/devicetree/bindings/arm/atmel-at91.txt | 2 +-
 arch/arm/boot/dts/at91rm9200.dtsi                    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 2e99b5b57350..424ac8cbfa08 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -98,7 +98,7 @@ Example:
 	};
 
 RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc",
+- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
 			"atmel,at91sam9260-sdramc",
 			"atmel,at91sam9g45-ddramc",
 			"atmel,sama5d3-ddramc",
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 4fb333bd1f85..6d0fa9b87f46 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -92,7 +92,7 @@
 			};
 
 			ramc0: ramc at ffffff00 {
-				compatible = "atmel,at91rm9200-sdramc";
+				compatible = "atmel,at91rm9200-sdramc", "syscon";
 				reg = <0xffffff00 0x100>;
 			};
 
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:44 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:44 +0100
Subject: [PATCH 08/10] ARM: at91/pm: use the atmel-mc syscon defines
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-9-git-send-email-alexandre.belloni@free-electrons.com>

Use the defines from atmel-mc.h instead of at91rm9200_sdramc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/include/mach/at91_ramc.h | 2 +-
 arch/arm/mach-at91/pm.c                     | 8 ++++----
 arch/arm/mach-at91/pm_suspend.S             | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
index 493bc486e858..39547496d4b0 100644
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -21,7 +21,7 @@ extern void __iomem *at91_ramc_base[];
 .extern at91_ramc_base
 #endif
 
-#include <soc/at91/at91rm9200_sdramc.h>
+#include <linux/mfd/syscon/atmel-mc.h>
 #include <soc/at91/at91sam9_ddrsdr.h>
 #include <soc/at91/at91sam9_sdramc.h>
 
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5062699cbb12..1e184767c3be 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -233,7 +233,7 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
  */
 static void at91rm9200_standby(void)
 {
-	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
+	u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);
 
 	asm volatile(
 		"b    1f\n\t"
@@ -244,8 +244,8 @@ static void at91rm9200_standby(void)
 		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
 		"    str    %5, [%1, %2]"
 		:
-		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
-		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
+		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR),
+		  "r" (1), "r" (AT91_MC_SDRAMC_SRR),
 		  "r" (lpr));
 }
 
@@ -414,7 +414,7 @@ void __init at91rm9200_pm_init(void)
 	/*
 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
 	 */
-	at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
+	at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
 
 	at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
 	at91_pm_data.memctrl = AT91_MEMCTRL_MC;
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index bd22b2c8a051..fda4e0164ed7 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -216,7 +216,7 @@ ENTRY(at91_sramc_self_refresh)
 
 	/* Active SDRAM self-refresh mode */
 	mov	r3, #1
-	str	r3, [r2, #AT91RM9200_SDRAMC_SRR]
+	str	r3, [r2, #AT91_MC_SDRAMC_SRR]
 	b	exit_sramc_sf
 
 ddrc_sf:
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:46 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:46 +0100
Subject: [PATCH 10/10] ARM: at91: remove at91rm9200_sdramc.h
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-11-git-send-email-alexandre.belloni@free-electrons.com>

include/soc/at91/at91rm9200_sdramc.h is replaced by
include/linux/mfd/syscon/atmel-smc.h as this is actually a syscon device.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 include/soc/at91/at91rm9200_sdramc.h | 63 ------------------------------------
 1 file changed, 63 deletions(-)
 delete mode 100644 include/soc/at91/at91rm9200_sdramc.h

diff --git a/include/soc/at91/at91rm9200_sdramc.h b/include/soc/at91/at91rm9200_sdramc.h
deleted file mode 100644
index aa047f458f1b..000000000000
--- a/include/soc/at91/at91rm9200_sdramc.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Memory Controllers (SDRAMC only) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_SDRAMC_H
-#define AT91RM9200_SDRAMC_H
-
-/* SDRAM Controller registers */
-#define AT91RM9200_SDRAMC_MR		0x90			/* Mode Register */
-#define		AT91RM9200_SDRAMC_MODE	(0xf << 0)		/* Command Mode */
-#define			AT91RM9200_SDRAMC_MODE_NORMAL		(0 << 0)
-#define			AT91RM9200_SDRAMC_MODE_NOP		(1 << 0)
-#define			AT91RM9200_SDRAMC_MODE_PRECHARGE	(2 << 0)
-#define			AT91RM9200_SDRAMC_MODE_LMR		(3 << 0)
-#define			AT91RM9200_SDRAMC_MODE_REFRESH	(4 << 0)
-#define		AT91RM9200_SDRAMC_DBW		(1   << 4)		/* Data Bus Width */
-#define			AT91RM9200_SDRAMC_DBW_32	(0 << 4)
-#define			AT91RM9200_SDRAMC_DBW_16	(1 << 4)
-
-#define AT91RM9200_SDRAMC_TR		0x94			/* Refresh Timer Register */
-#define		AT91RM9200_SDRAMC_COUNT	(0xfff << 0)		/* Refresh Timer Count */
-
-#define AT91RM9200_SDRAMC_CR		0x98			/* Configuration Register */
-#define		AT91RM9200_SDRAMC_NC		(3   <<  0)		/* Number of Column Bits */
-#define			AT91RM9200_SDRAMC_NC_8	(0 << 0)
-#define			AT91RM9200_SDRAMC_NC_9	(1 << 0)
-#define			AT91RM9200_SDRAMC_NC_10	(2 << 0)
-#define			AT91RM9200_SDRAMC_NC_11	(3 << 0)
-#define		AT91RM9200_SDRAMC_NR		(3   <<  2)		/* Number of Row Bits */
-#define			AT91RM9200_SDRAMC_NR_11	(0 << 2)
-#define			AT91RM9200_SDRAMC_NR_12	(1 << 2)
-#define			AT91RM9200_SDRAMC_NR_13	(2 << 2)
-#define		AT91RM9200_SDRAMC_NB		(1   <<  4)		/* Number of Banks */
-#define			AT91RM9200_SDRAMC_NB_2	(0 << 4)
-#define			AT91RM9200_SDRAMC_NB_4	(1 << 4)
-#define		AT91RM9200_SDRAMC_CAS		(3   <<  5)		/* CAS Latency */
-#define			AT91RM9200_SDRAMC_CAS_2	(2 << 5)
-#define		AT91RM9200_SDRAMC_TWR		(0xf <<  7)		/* Write Recovery Delay */
-#define		AT91RM9200_SDRAMC_TRC		(0xf << 11)		/* Row Cycle Delay */
-#define		AT91RM9200_SDRAMC_TRP		(0xf << 15)		/* Row Precharge Delay */
-#define		AT91RM9200_SDRAMC_TRCD	(0xf << 19)		/* Row to Column Delay */
-#define		AT91RM9200_SDRAMC_TRAS	(0xf << 23)		/* Active to Precharge Delay */
-#define		AT91RM9200_SDRAMC_TXSR	(0xf << 27)		/* Exit Self Refresh to Active Delay */
-
-#define AT91RM9200_SDRAMC_SRR		0x9c			/* Self Refresh Register */
-#define AT91RM9200_SDRAMC_LPR		0xa0			/* Low Power Register */
-#define AT91RM9200_SDRAMC_IER		0xa4			/* Interrupt Enable Register */
-#define AT91RM9200_SDRAMC_IDR		0xa8			/* Interrupt Disable Register */
-#define AT91RM9200_SDRAMC_IMR		0xac			/* Interrupt Mask Register */
-#define AT91RM9200_SDRAMC_ISR		0xb0			/* Interrupt Status Register */
-
-#endif
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:43 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:43 +0100
Subject: [PATCH 07/10] pcmcia: at91_cf: Use syscon to configure the MC/smc
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-8-git-send-email-alexandre.belloni@free-electrons.com>

Use syscon/regmap to configure the smc part of the memory controller. This
allows to avoid using mach/at91rm9200_mc.h and mach/at91_ramc.h and to compile
the driver in a multiplatform configuration.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 drivers/pcmcia/Kconfig   |  1 -
 drivers/pcmcia/at91_cf.c | 25 ++++++++++++++-----------
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 075d5cd4c5ab..56ff3dc1235e 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -280,7 +280,6 @@ config AT91_CF
 	tristate "AT91 CompactFlash Controller"
 	depends on PCI
 	depends on PCMCIA && ARCH_AT91
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  Say Y here to support the CompactFlash controller on AT91 chips.
 	  Or choose M to compile the driver as a module named "at91_cf".
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index e7775a41ae5d..87147bcd1655 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -20,16 +20,15 @@
 #include <linux/platform_data/atmel.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-mc.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/of_gpio.h>
+#include <linux/regmap.h>
 
 #include <pcmcia/ss.h>
 
-#include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
-
-
 /*
  * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
  * some other bit in {A24,A22..A11} is nREG to flag memory access
@@ -40,6 +39,8 @@
 #define	CF_IO_PHYS	(1 << 23)
 #define	CF_MEM_PHYS	(0x017ff800)
 
+struct regmap *mc;
+
 /*--------------------------------------------------------------------------*/
 
 struct at91_cf_socket {
@@ -155,10 +156,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
 
 	/*
 	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
-	 */
-	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
-
-	/*
+	 *
 	 * NOTE: this CF controller ignores IOIS16, so we can't really do
 	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
 	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
@@ -169,13 +167,14 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
 	 * CF 3.0 spec table 35 also giving the D8-D15 option.
 	 */
 	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
-		csr |= AT91_SMC_DBW_8;
+		csr = AT91_MC_SMC_DBW_8;
 		dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
 	} else {
-		csr |= AT91_SMC_DBW_16;
+		csr = AT91_MC_SMC_DBW_16;
 		dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
 	}
-	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
+	regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect),
+			   AT91_MC_SMC_DBW, csr);
 
 	io->start = cf->socket.io_offset;
 	io->stop = io->start + SZ_2K - 1;
@@ -236,6 +235,10 @@ static int at91_cf_dt_init(struct platform_device *pdev)
 
 	pdev->dev.platform_data = board;
 
+	mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc");
+	if (IS_ERR(mc))
+		return PTR_ERR(mc);
+
 	return 0;
 }
 #else
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:45 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:45 +0100
Subject: [PATCH 09/10] ARM: at91: remove mach/at91_ramc.h and
 mach/at91rm9200_mc.h
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-10-git-send-email-alexandre.belloni@free-electrons.com>

mach/at91_ramc.h and mach/at91rm9200_mc.h are necessary anymore, remove them.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/Makefile                     |   3 -
 arch/arm/mach-at91/include/mach/at91_ramc.h     |  28 ------
 arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 116 ------------------------
 arch/arm/mach-at91/pm.h                         |  14 ++-
 arch/arm/mach-at91/pm_suspend.S                 |   1 -
 5 files changed, 13 insertions(+), 149 deletions(-)
 delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 3586d977e99d..fa4393ab3e7b 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,9 +1,6 @@
 #
 # Makefile for the linux kernel.
 #
-ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-
 obj-y		:= soc.o
 
 # CPU-specific support
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
deleted file mode 100644
index 39547496d4b0..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Header file for the Atmel RAM Controller
- *
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
- *
- * Under GPLv2 only
- */
-
-#ifndef __AT91_RAMC_H__
-#define __AT91_RAMC_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_ramc_base[];
-
-#define at91_ramc_read(id, field) \
-	__raw_readl(at91_ramc_base[id] + field)
-
-#define at91_ramc_write(id, field, value) \
-	__raw_writel(value, at91_ramc_base[id] + field)
-#else
-.extern at91_ramc_base
-#endif
-
-#include <linux/mfd/syscon/atmel-mc.h>
-#include <soc/at91/at91sam9_ddrsdr.h>
-#include <soc/at91/at91sam9_sdramc.h>
-
-#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
deleted file mode 100644
index aeaadfb452af..000000000000
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91rm9200_mc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_MC_H
-#define AT91RM9200_MC_H
-
-/* Memory Controller */
-#define AT91_MC_RCR		0x00			/* MC Remap Control Register */
-#define		AT91_MC_RCB		(1 <<  0)		/* Remap Command Bit */
-
-#define AT91_MC_ASR		0x04			/* MC Abort Status Register */
-#define		AT91_MC_UNADD		(1 <<  0)		/* Undefined Address Abort Status */
-#define		AT91_MC_MISADD		(1 <<  1)		/* Misaligned Address Abort Status */
-#define		AT91_MC_ABTSZ		(3 <<  8)		/* Abort Size Status */
-#define			AT91_MC_ABTSZ_BYTE		(0 << 8)
-#define			AT91_MC_ABTSZ_HALFWORD		(1 << 8)
-#define			AT91_MC_ABTSZ_WORD		(2 << 8)
-#define		AT91_MC_ABTTYP		(3 << 10)		/* Abort Type Status */
-#define			AT91_MC_ABTTYP_DATAREAD		(0 << 10)
-#define			AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
-#define			AT91_MC_ABTTYP_FETCH		(2 << 10)
-#define		AT91_MC_MST0		(1 << 16)		/* ARM920T Abort Source */
-#define		AT91_MC_MST1		(1 << 17)		/* PDC Abort Source */
-#define		AT91_MC_MST2		(1 << 18)		/* UHP Abort Source */
-#define		AT91_MC_MST3		(1 << 19)		/* EMAC Abort Source */
-#define		AT91_MC_SVMST0		(1 << 24)		/* Saved ARM920T Abort Source */
-#define		AT91_MC_SVMST1		(1 << 25)		/* Saved PDC Abort Source */
-#define		AT91_MC_SVMST2		(1 << 26)		/* Saved UHP Abort Source */
-#define		AT91_MC_SVMST3		(1 << 27)		/* Saved EMAC Abort Source */
-
-#define AT91_MC_AASR		0x08			/* MC Abort Address Status Register */
-
-#define AT91_MC_MPR		0x0c			/* MC Master Priority Register */
-#define		AT91_MPR_MSTP0		(7 <<  0)		/* ARM920T Priority */
-#define		AT91_MPR_MSTP1		(7 <<  4)		/* PDC Priority */
-#define		AT91_MPR_MSTP2		(7 <<  8)		/* UHP Priority */
-#define		AT91_MPR_MSTP3		(7 << 12)		/* EMAC Priority */
-
-/* External Bus Interface (EBI) registers */
-#define AT91_EBI_CSA		0x60			/* Chip Select Assignment Register */
-#define		AT91_EBI_CS0A		(1 << 0)		/* Chip Select 0 Assignment */
-#define			AT91_EBI_CS0A_SMC		(0 << 0)
-#define			AT91_EBI_CS0A_BFC		(1 << 0)
-#define		AT91_EBI_CS1A		(1 << 1)		/* Chip Select 1 Assignment */
-#define			AT91_EBI_CS1A_SMC		(0 << 1)
-#define			AT91_EBI_CS1A_SDRAMC		(1 << 1)
-#define		AT91_EBI_CS3A		(1 << 3)		/* Chip Select 2 Assignment */
-#define			AT91_EBI_CS3A_SMC		(0 << 3)
-#define			AT91_EBI_CS3A_SMC_SMARTMEDIA	(1 << 3)
-#define		AT91_EBI_CS4A		(1 << 4)		/* Chip Select 3 Assignment */
-#define			AT91_EBI_CS4A_SMC		(0 << 4)
-#define			AT91_EBI_CS4A_SMC_COMPACTFLASH	(1 << 4)
-#define AT91_EBI_CFGR		(AT91_MC + 0x64)	/* Configuration Register */
-#define		AT91_EBI_DBPUC		(1 << 0)		/* Data Bus Pull-Up Configuration */
-
-/* Static Memory Controller (SMC) registers */
-#define	AT91_SMC_CSR(n)		(0x70 + ((n) * 4))	/* SMC Chip Select Register */
-#define		AT91_SMC_NWS		(0x7f <<  0)		/* Number of Wait States */
-#define			AT91_SMC_NWS_(x)	((x) << 0)
-#define		AT91_SMC_WSEN		(1    <<  7)		/* Wait State Enable */
-#define		AT91_SMC_TDF		(0xf  <<  8)		/* Data Float Time */
-#define			AT91_SMC_TDF_(x)	((x) << 8)
-#define		AT91_SMC_BAT		(1    << 12)		/* Byte Access Type */
-#define		AT91_SMC_DBW		(3    << 13)		/* Data Bus Width */
-#define			AT91_SMC_DBW_16		(1 << 13)
-#define			AT91_SMC_DBW_8		(2 << 13)
-#define		AT91_SMC_DPR		(1 << 15)		/* Data Read Protocol */
-#define		AT91_SMC_ACSS		(3 << 16)		/* Address to Chip Select Setup */
-#define			AT91_SMC_ACSS_STD	(0 << 16)
-#define			AT91_SMC_ACSS_1		(1 << 16)
-#define			AT91_SMC_ACSS_2		(2 << 16)
-#define			AT91_SMC_ACSS_3		(3 << 16)
-#define		AT91_SMC_RWSETUP	(7 << 24)		/* Read & Write Signal Time Setup */
-#define			AT91_SMC_RWSETUP_(x)	((x) << 24)
-#define		AT91_SMC_RWHOLD		(7 << 28)		/* Read & Write Signal Hold Time */
-#define			AT91_SMC_RWHOLD_(x)	((x) << 28)
-
-/* Burst Flash Controller register */
-#define AT91_BFC_MR		0xc0			/* Mode Register */
-#define		AT91_BFC_BFCOM		(3   <<  0)		/* Burst Flash Controller Operating Mode */
-#define			AT91_BFC_BFCOM_DISABLED	(0 << 0)
-#define			AT91_BFC_BFCOM_ASYNC	(1 << 0)
-#define			AT91_BFC_BFCOM_BURST	(2 << 0)
-#define		AT91_BFC_BFCC		(3   <<  2)		/* Burst Flash Controller Clock */
-#define			AT91_BFC_BFCC_MCK	(1 << 2)
-#define			AT91_BFC_BFCC_DIV2	(2 << 2)
-#define			AT91_BFC_BFCC_DIV4	(3 << 2)
-#define		AT91_BFC_AVL		(0xf <<  4)		/* Address Valid Latency */
-#define		AT91_BFC_PAGES		(7   <<  8)		/* Page Size */
-#define			AT91_BFC_PAGES_NO_PAGE	(0 << 8)
-#define			AT91_BFC_PAGES_16	(1 << 8)
-#define			AT91_BFC_PAGES_32	(2 << 8)
-#define			AT91_BFC_PAGES_64	(3 << 8)
-#define			AT91_BFC_PAGES_128	(4 << 8)
-#define			AT91_BFC_PAGES_256	(5 << 8)
-#define			AT91_BFC_PAGES_512	(6 << 8)
-#define			AT91_BFC_PAGES_1024	(7 << 8)
-#define		AT91_BFC_OEL		(3   << 12)		/* Output Enable Latency */
-#define		AT91_BFC_BAAEN		(1   << 16)		/* Burst Address Advance Enable */
-#define		AT91_BFC_BFOEH		(1   << 17)		/* Burst Flash Output Enable Handling */
-#define		AT91_BFC_MUXEN		(1   << 18)		/* Multiplexed Bus Enable */
-#define		AT91_BFC_RDYEN		(1   << 19)		/* Ready Enable Mode */
-
-#endif
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index ecd875a91d52..3fcf8810f14e 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -13,7 +13,19 @@
 
 #include <asm/proc-fns.h>
 
-#include <mach/at91_ramc.h>
+#include <linux/mfd/syscon/atmel-mc.h>
+#include <soc/at91/at91sam9_ddrsdr.h>
+#include <soc/at91/at91sam9_sdramc.h>
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_ramc_base[];
+
+#define at91_ramc_read(id, field) \
+	__raw_readl(at91_ramc_base[id] + field)
+
+#define at91_ramc_write(id, field, value) \
+	__raw_writel(value, at91_ramc_base[id] + field)
+#endif
 
 #define AT91_MEMCTRL_MC		0
 #define AT91_MEMCTRL_SDRAMC	1
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index fda4e0164ed7..0d95f488b47a 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -13,7 +13,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/clk/at91_pmc.h>
-#include <mach/at91_ramc.h>
 #include "pm.h"
 
 #define	SRAMC_SELF_FRESH_ACTIVE		0x01
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 16 15:44:41 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 16 Mar 2015 23:44:41 +0100
Subject: [PATCH 05/10] mfd: syscon: Add Atmel MC (Memory Controller) registers
 definition
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>

From: Boris Brezillon <boris.brezillon at free-electrons.com>

The at91rm9200 SoC embeds a Memory Controller block which is used to
configure several aspects of the platform:
- AHB/APB Bus behavior
- SDRAM Controller
- EBI (External Bus Interface) and SMC (Static Memory Controller) config

Those registers might be accessed by different drivers, hence we need to
define it as a syscon device.

Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
---
 include/linux/mfd/syscon/atmel-mc.h | 144 ++++++++++++++++++++++++++++++++++++
 1 file changed, 144 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-mc.h

diff --git a/include/linux/mfd/syscon/atmel-mc.h b/include/linux/mfd/syscon/atmel-mc.h
new file mode 100644
index 000000000000..cb7d9fe89e44
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-mc.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals
+ * registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MC_H_
+#define _LINUX_MFD_SYSCON_ATMEL_MC_H_
+
+/* Memory Controller */
+#define AT91_MC_RCR			0x00
+#define AT91_MC_RCB			BIT(0)
+
+#define AT91_MC_ASR			0x04
+#define AT91_MC_UNADD			BIT(0)
+#define AT91_MC_MISADD			BIT(1)
+#define AT91_MC_ABTSZ			GENMASK(9, 8)
+#define AT91_MC_ABTSZ_BYTE		(0 << 8)
+#define AT91_MC_ABTSZ_HALFWORD		(1 << 8)
+#define AT91_MC_ABTSZ_WORD		(2 << 8)
+#define AT91_MC_ABTTYP			GENMASK(11, 10)
+#define AT91_MC_ABTTYP_DATAREAD		(0 << 10)
+#define AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
+#define AT91_MC_ABTTYP_FETCH		(2 << 10)
+#define AT91_MC_MST(n)			BIT(16 + (n))
+#define AT91_MC_SVMST(n)		BIT(24 + (n))
+
+#define AT91_MC_AASR			0x08
+
+#define AT91_MC_MPR			0x0c
+#define AT91_MPR_MSTP(n)		GENMASK(2 + ((x) * 4), ((x) * 4))
+
+/* External Bus Interface (EBI) registers */
+#define AT91_MC_EBI_CSA			0x60
+#define AT91_MC_EBI_CS(n)		BIT(x)
+#define AT91_MC_EBI_NUM_CS		8
+
+#define AT91_MC_EBI_CFGR		0x64
+#define AT91_MC_EBI_DBPUC		BIT(0)
+
+/* Static Memory Controller (SMC) registers */
+#define	AT91_MC_SMC_CSR(n)		(0x70 + ((n) * 4))
+#define AT91_MC_SMC_NWS			GENMASK(6, 0)
+#define AT91_MC_SMC_NWS_(x)		((x) << 0)
+#define AT91_MC_SMC_WSEN		BIT(7)
+#define AT91_MC_SMC_TDF			GENMASK(11, 8)
+#define AT91_MC_SMC_TDF_(x)		((x) << 8)
+#define AT91_MC_SMC_TDF_MAX		0xf
+#define AT91_MC_SMC_BAT			BIT(12)
+#define AT91_MC_SMC_DBW			GENMASK(14, 13)
+#define AT91_MC_SMC_DBW_16		(1 << 13)
+#define AT91_MC_SMC_DBW_8		(2 << 13)
+#define AT91_MC_SMC_DPR			BIT(15)
+#define AT91_MC_SMC_ACSS		GENMASK(17, 16)
+#define AT91_MC_SMC_ACSS_(x)		((x) << 16)
+#define AT91_MC_SMC_ACSS_MAX		3
+#define AT91_MC_SMC_RWSETUP		GENMASK(26, 24)
+#define AT91_MC_SMC_RWSETUP_(x)		((x) << 24)
+#define AT91_MC_SMC_RWHOLD		GENMASK(30, 28)
+#define AT91_MC_SMC_RWHOLD_(x)		((x) << 28)
+#define AT91_MC_SMC_RWHOLDSETUP_MAX	7
+
+/* SDRAM Controller registers */
+#define AT91_MC_SDRAMC_MR		0x90
+#define AT91_MC_SDRAMC_MODE		GENMASK(3, 0)
+#define AT91_MC_SDRAMC_MODE_NORMAL	(0 << 0)
+#define AT91_MC_SDRAMC_MODE_NOP		(1 << 0)
+#define AT91_MC_SDRAMC_MODE_PRECHARGE	(2 << 0)
+#define AT91_MC_SDRAMC_MODE_LMR		(3 << 0)
+#define AT91_MC_SDRAMC_MODE_REFRESH	(4 << 0)
+#define AT91_MC_SDRAMC_DBW_16		BIT(4)
+
+#define AT91_MC_SDRAMC_TR		0x94
+#define AT91_MC_SDRAMC_COUNT		GENMASK(11, 0)
+
+#define AT91_MC_SDRAMC_CR		0x98
+#define AT91_MC_SDRAMC_NC		GENMASK(1, 0)
+#define AT91_MC_SDRAMC_NC_8		(0 << 0)
+#define AT91_MC_SDRAMC_NC_9		(1 << 0)
+#define AT91_MC_SDRAMC_NC_10		(2 << 0)
+#define AT91_MC_SDRAMC_NC_11		(3 << 0)
+#define AT91_MC_SDRAMC_NR		GENMASK(3, 2)
+#define AT91_MC_SDRAMC_NR_11		(0 << 2)
+#define AT91_MC_SDRAMC_NR_12		(1 << 2)
+#define AT91_MC_SDRAMC_NR_13		(2 << 2)
+#define	AT91_MC_SDRAMC_NB		BIT(4)
+#define AT91_MC_SDRAMC_NB_2		(0 << 4)
+#define AT91_MC_SDRAMC_NB_4		(1 << 4)
+#define AT91_MC_SDRAMC_CAS		GENMASK(6, 5)
+#define AT91_MC_SDRAMC_CAS_2		(2 << 5)
+#define AT91_MC_SDRAMC_TWR		GENMASK(10,  7)
+#define AT91_MC_SDRAMC_TRC		GENMASK(14, 11)
+#define AT91_MC_SDRAMC_TRP		GENMASK(18, 15)
+#define AT91_MC_SDRAMC_TRCD		GENMASK(22, 19)
+#define AT91_MC_SDRAMC_TRAS		GENMASK(26, 23)
+#define AT91_MC_SDRAMC_TXSR		GENMASK(30, 27)
+
+#define AT91_MC_SDRAMC_SRR		0x9c
+#define AT91_MC_SDRAMC_SRCB		BIT(0)
+
+#define AT91_MC_SDRAMC_LPR		0xa0
+#define AT91_MC_SDRAMC_LPCB		BIT(0)
+
+#define AT91_MC_SDRAMC_IER		0xa4
+#define AT91_MC_SDRAMC_IDR		0xa8
+#define AT91_MC_SDRAMC_IMR		0xac
+#define AT91_MC_SDRAMC_ISR		0xb0
+#define AT91_MC_SDRAMC_RES		BIT(0)
+
+/* Burst Flash Controller register */
+#define AT91_MC_BFC_MR			0xc0
+#define AT91_MC_BFC_BFCOM		GENMASK(1, 0)
+#define AT91_MC_BFC_BFCOM_DISABLED	(0 << 0)
+#define AT91_MC_BFC_BFCOM_ASYNC		(1 << 0)
+#define AT91_MC_BFC_BFCOM_BURST		(2 << 0)
+#define AT91_MC_BFC_BFCC		GENMASK(3, 2)
+#define AT91_MC_BFC_BFCC_MCK		(1 << 2)
+#define AT91_MC_BFC_BFCC_DIV2		(2 << 2)
+#define AT91_MC_BFC_BFCC_DIV4		(3 << 2)
+#define AT91_MC_BFC_AVL			GENMASK(7,  4)
+#define AT91_MC_BFC_PAGES		GENMASK(10, 8)
+#define AT91_MC_BFC_PAGES_NO_PAGE	(0 << 8)
+#define AT91_MC_BFC_PAGES_16		(1 << 8)
+#define AT91_MC_BFC_PAGES_32		(2 << 8)
+#define AT91_MC_BFC_PAGES_64		(3 << 8)
+#define AT91_MC_BFC_PAGES_128		(4 << 8)
+#define AT91_MC_BFC_PAGES_256		(5 << 8)
+#define AT91_MC_BFC_PAGES_512		(6 << 8)
+#define AT91_MC_BFC_PAGES_1024		(7 << 8)
+#define AT91_MC_BFC_OEL			GENMASK(13, 12)
+#define AT91_MC_BFC_BAAEN		BIT(16)
+#define AT91_MC_BFC_BFOEH		BIT(17)
+#define AT91_MC_BFC_MUXEN		BIT(18)
+#define AT91_MC_BFC_RDYEN		BIT(19)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MC_H_ */
-- 
2.1.0



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From: daweixia at qq.com (Xia Dawei)
Date: Tue, 17 Mar 2015 11:19:33 +0700
Subject: Proposal From Xia Dawei
Message-ID: <201503180431.t2I4CNju026112@bruhost.ispserver.com>


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Attention:
This e-mail and any files transmitted with it are confidential and may be privileged and are intended solely for the use of the individual or entity to whom they are addressed. Any  unauthorized direct or indirect dissemination, distribution or copying of this message is strictly prohibited. If you have received the e-mail in error please notify the sender.
Any views or opinions presented are solely those of the author.


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From nicolas.ferre at atmel.com  Mon Mar 23 02:57:35 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 10:57:35 +0100
Subject: [PATCH 05/10] mfd: syscon: Add Atmel MC (Memory Controller)
 registers definition
In-Reply-To: <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE38F.7070701@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> From: Boris Brezillon <boris.brezillon at free-electrons.com>
> 
> The at91rm9200 SoC embeds a Memory Controller block which is used to
> configure several aspects of the platform:
> - AHB/APB Bus behavior
> - SDRAM Controller
> - EBI (External Bus Interface) and SMC (Static Memory Controller) config
> 
> Those registers might be accessed by different drivers, hence we need to
> define it as a syscon device.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>

Alexandre, don't you need to Ack this patch at least?


> ---
>  include/linux/mfd/syscon/atmel-mc.h | 144 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 144 insertions(+)
>  create mode 100644 include/linux/mfd/syscon/atmel-mc.h
> 
> diff --git a/include/linux/mfd/syscon/atmel-mc.h b/include/linux/mfd/syscon/atmel-mc.h
> new file mode 100644
> index 000000000000..cb7d9fe89e44
> --- /dev/null
> +++ b/include/linux/mfd/syscon/atmel-mc.h
> @@ -0,0 +1,144 @@
> +/*
> + * Copyright (C) 2005 Ivan Kokshaysky
> + * Copyright (C) SAN People
> + *
> + * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals
> + * registers.
> + * Based on AT91RM9200 datasheet revision E.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_MFD_SYSCON_ATMEL_MC_H_
> +#define _LINUX_MFD_SYSCON_ATMEL_MC_H_
> +
> +/* Memory Controller */
> +#define AT91_MC_RCR			0x00
> +#define AT91_MC_RCB			BIT(0)
> +
> +#define AT91_MC_ASR			0x04
> +#define AT91_MC_UNADD			BIT(0)
> +#define AT91_MC_MISADD			BIT(1)
> +#define AT91_MC_ABTSZ			GENMASK(9, 8)
> +#define AT91_MC_ABTSZ_BYTE		(0 << 8)
> +#define AT91_MC_ABTSZ_HALFWORD		(1 << 8)
> +#define AT91_MC_ABTSZ_WORD		(2 << 8)
> +#define AT91_MC_ABTTYP			GENMASK(11, 10)
> +#define AT91_MC_ABTTYP_DATAREAD		(0 << 10)
> +#define AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
> +#define AT91_MC_ABTTYP_FETCH		(2 << 10)
> +#define AT91_MC_MST(n)			BIT(16 + (n))
> +#define AT91_MC_SVMST(n)		BIT(24 + (n))
> +
> +#define AT91_MC_AASR			0x08
> +
> +#define AT91_MC_MPR			0x0c
> +#define AT91_MPR_MSTP(n)		GENMASK(2 + ((x) * 4), ((x) * 4))
> +
> +/* External Bus Interface (EBI) registers */
> +#define AT91_MC_EBI_CSA			0x60
> +#define AT91_MC_EBI_CS(n)		BIT(x)
> +#define AT91_MC_EBI_NUM_CS		8
> +
> +#define AT91_MC_EBI_CFGR		0x64
> +#define AT91_MC_EBI_DBPUC		BIT(0)
> +
> +/* Static Memory Controller (SMC) registers */
> +#define	AT91_MC_SMC_CSR(n)		(0x70 + ((n) * 4))
> +#define AT91_MC_SMC_NWS			GENMASK(6, 0)
> +#define AT91_MC_SMC_NWS_(x)		((x) << 0)
> +#define AT91_MC_SMC_WSEN		BIT(7)
> +#define AT91_MC_SMC_TDF			GENMASK(11, 8)
> +#define AT91_MC_SMC_TDF_(x)		((x) << 8)
> +#define AT91_MC_SMC_TDF_MAX		0xf
> +#define AT91_MC_SMC_BAT			BIT(12)
> +#define AT91_MC_SMC_DBW			GENMASK(14, 13)
> +#define AT91_MC_SMC_DBW_16		(1 << 13)
> +#define AT91_MC_SMC_DBW_8		(2 << 13)
> +#define AT91_MC_SMC_DPR			BIT(15)
> +#define AT91_MC_SMC_ACSS		GENMASK(17, 16)
> +#define AT91_MC_SMC_ACSS_(x)		((x) << 16)
> +#define AT91_MC_SMC_ACSS_MAX		3
> +#define AT91_MC_SMC_RWSETUP		GENMASK(26, 24)
> +#define AT91_MC_SMC_RWSETUP_(x)		((x) << 24)
> +#define AT91_MC_SMC_RWHOLD		GENMASK(30, 28)
> +#define AT91_MC_SMC_RWHOLD_(x)		((x) << 28)
> +#define AT91_MC_SMC_RWHOLDSETUP_MAX	7
> +
> +/* SDRAM Controller registers */
> +#define AT91_MC_SDRAMC_MR		0x90
> +#define AT91_MC_SDRAMC_MODE		GENMASK(3, 0)
> +#define AT91_MC_SDRAMC_MODE_NORMAL	(0 << 0)
> +#define AT91_MC_SDRAMC_MODE_NOP		(1 << 0)
> +#define AT91_MC_SDRAMC_MODE_PRECHARGE	(2 << 0)
> +#define AT91_MC_SDRAMC_MODE_LMR		(3 << 0)
> +#define AT91_MC_SDRAMC_MODE_REFRESH	(4 << 0)
> +#define AT91_MC_SDRAMC_DBW_16		BIT(4)
> +
> +#define AT91_MC_SDRAMC_TR		0x94
> +#define AT91_MC_SDRAMC_COUNT		GENMASK(11, 0)
> +
> +#define AT91_MC_SDRAMC_CR		0x98
> +#define AT91_MC_SDRAMC_NC		GENMASK(1, 0)
> +#define AT91_MC_SDRAMC_NC_8		(0 << 0)
> +#define AT91_MC_SDRAMC_NC_9		(1 << 0)
> +#define AT91_MC_SDRAMC_NC_10		(2 << 0)
> +#define AT91_MC_SDRAMC_NC_11		(3 << 0)
> +#define AT91_MC_SDRAMC_NR		GENMASK(3, 2)
> +#define AT91_MC_SDRAMC_NR_11		(0 << 2)
> +#define AT91_MC_SDRAMC_NR_12		(1 << 2)
> +#define AT91_MC_SDRAMC_NR_13		(2 << 2)
> +#define	AT91_MC_SDRAMC_NB		BIT(4)
> +#define AT91_MC_SDRAMC_NB_2		(0 << 4)
> +#define AT91_MC_SDRAMC_NB_4		(1 << 4)
> +#define AT91_MC_SDRAMC_CAS		GENMASK(6, 5)
> +#define AT91_MC_SDRAMC_CAS_2		(2 << 5)
> +#define AT91_MC_SDRAMC_TWR		GENMASK(10,  7)
> +#define AT91_MC_SDRAMC_TRC		GENMASK(14, 11)
> +#define AT91_MC_SDRAMC_TRP		GENMASK(18, 15)
> +#define AT91_MC_SDRAMC_TRCD		GENMASK(22, 19)
> +#define AT91_MC_SDRAMC_TRAS		GENMASK(26, 23)
> +#define AT91_MC_SDRAMC_TXSR		GENMASK(30, 27)
> +
> +#define AT91_MC_SDRAMC_SRR		0x9c
> +#define AT91_MC_SDRAMC_SRCB		BIT(0)
> +
> +#define AT91_MC_SDRAMC_LPR		0xa0
> +#define AT91_MC_SDRAMC_LPCB		BIT(0)
> +
> +#define AT91_MC_SDRAMC_IER		0xa4
> +#define AT91_MC_SDRAMC_IDR		0xa8
> +#define AT91_MC_SDRAMC_IMR		0xac
> +#define AT91_MC_SDRAMC_ISR		0xb0
> +#define AT91_MC_SDRAMC_RES		BIT(0)
> +
> +/* Burst Flash Controller register */
> +#define AT91_MC_BFC_MR			0xc0
> +#define AT91_MC_BFC_BFCOM		GENMASK(1, 0)
> +#define AT91_MC_BFC_BFCOM_DISABLED	(0 << 0)
> +#define AT91_MC_BFC_BFCOM_ASYNC		(1 << 0)
> +#define AT91_MC_BFC_BFCOM_BURST		(2 << 0)
> +#define AT91_MC_BFC_BFCC		GENMASK(3, 2)
> +#define AT91_MC_BFC_BFCC_MCK		(1 << 2)
> +#define AT91_MC_BFC_BFCC_DIV2		(2 << 2)
> +#define AT91_MC_BFC_BFCC_DIV4		(3 << 2)
> +#define AT91_MC_BFC_AVL			GENMASK(7,  4)
> +#define AT91_MC_BFC_PAGES		GENMASK(10, 8)
> +#define AT91_MC_BFC_PAGES_NO_PAGE	(0 << 8)
> +#define AT91_MC_BFC_PAGES_16		(1 << 8)
> +#define AT91_MC_BFC_PAGES_32		(2 << 8)
> +#define AT91_MC_BFC_PAGES_64		(3 << 8)
> +#define AT91_MC_BFC_PAGES_128		(4 << 8)
> +#define AT91_MC_BFC_PAGES_256		(5 << 8)
> +#define AT91_MC_BFC_PAGES_512		(6 << 8)
> +#define AT91_MC_BFC_PAGES_1024		(7 << 8)
> +#define AT91_MC_BFC_OEL			GENMASK(13, 12)
> +#define AT91_MC_BFC_BAAEN		BIT(16)
> +#define AT91_MC_BFC_BFOEH		BIT(17)
> +#define AT91_MC_BFC_MUXEN		BIT(18)
> +#define AT91_MC_BFC_RDYEN		BIT(19)
> +
> +#endif /* _LINUX_MFD_SYSCON_ATMEL_MC_H_ */
> 

I'm not a big fan of the use of BIT/GENMASK macros in mix with the <<
operator, but I guess it can be done anyway, so I'm okay:
Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>

Bye,
-- 
Nicolas Ferre


From nicolas.ferre at atmel.com  Mon Mar 23 03:01:07 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 11:01:07 +0100
Subject: [PATCH 09/10] ARM: at91: remove mach/at91_ramc.h and
 mach/at91rm9200_mc.h
In-Reply-To: <1426545886-19162-10-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-10-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE463.3040300@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> mach/at91_ramc.h and mach/at91rm9200_mc.h are necessary anymore, remove them.

s/are/aren't/ ?

> Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
> ---
>  arch/arm/mach-at91/Makefile                     |   3 -
>  arch/arm/mach-at91/include/mach/at91_ramc.h     |  28 ------
>  arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 116 ------------------------
>  arch/arm/mach-at91/pm.h                         |  14 ++-
>  arch/arm/mach-at91/pm_suspend.S                 |   1 -
>  5 files changed, 13 insertions(+), 149 deletions(-)
>  delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
>  delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
> 
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 3586d977e99d..fa4393ab3e7b 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -1,9 +1,6 @@
>  #
>  # Makefile for the linux kernel.
>  #
> -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
> -asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
> -
>  obj-y		:= soc.o
>  
>  # CPU-specific support
> diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
> deleted file mode 100644
> index 39547496d4b0..000000000000
> --- a/arch/arm/mach-at91/include/mach/at91_ramc.h
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -/*
> - * Header file for the Atmel RAM Controller
> - *
> - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> - *
> - * Under GPLv2 only
> - */
> -
> -#ifndef __AT91_RAMC_H__
> -#define __AT91_RAMC_H__
> -
> -#ifndef __ASSEMBLY__
> -extern void __iomem *at91_ramc_base[];
> -
> -#define at91_ramc_read(id, field) \
> -	__raw_readl(at91_ramc_base[id] + field)
> -
> -#define at91_ramc_write(id, field, value) \
> -	__raw_writel(value, at91_ramc_base[id] + field)
> -#else
> -.extern at91_ramc_base
> -#endif
> -
> -#include <linux/mfd/syscon/atmel-mc.h>
> -#include <soc/at91/at91sam9_ddrsdr.h>
> -#include <soc/at91/at91sam9_sdramc.h>
> -
> -#endif /* __AT91_RAMC_H__ */
> diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
> deleted file mode 100644
> index aeaadfb452af..000000000000
> --- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
> +++ /dev/null
> @@ -1,116 +0,0 @@
> -/*
> - * arch/arm/mach-at91/include/mach/at91rm9200_mc.h
> - *
> - * Copyright (C) 2005 Ivan Kokshaysky
> - * Copyright (C) SAN People
> - *
> - * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.
> - * Based on AT91RM9200 datasheet revision E.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - */
> -
> -#ifndef AT91RM9200_MC_H
> -#define AT91RM9200_MC_H
> -
> -/* Memory Controller */
> -#define AT91_MC_RCR		0x00			/* MC Remap Control Register */
> -#define		AT91_MC_RCB		(1 <<  0)		/* Remap Command Bit */
> -
> -#define AT91_MC_ASR		0x04			/* MC Abort Status Register */
> -#define		AT91_MC_UNADD		(1 <<  0)		/* Undefined Address Abort Status */
> -#define		AT91_MC_MISADD		(1 <<  1)		/* Misaligned Address Abort Status */
> -#define		AT91_MC_ABTSZ		(3 <<  8)		/* Abort Size Status */
> -#define			AT91_MC_ABTSZ_BYTE		(0 << 8)
> -#define			AT91_MC_ABTSZ_HALFWORD		(1 << 8)
> -#define			AT91_MC_ABTSZ_WORD		(2 << 8)
> -#define		AT91_MC_ABTTYP		(3 << 10)		/* Abort Type Status */
> -#define			AT91_MC_ABTTYP_DATAREAD		(0 << 10)
> -#define			AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
> -#define			AT91_MC_ABTTYP_FETCH		(2 << 10)
> -#define		AT91_MC_MST0		(1 << 16)		/* ARM920T Abort Source */
> -#define		AT91_MC_MST1		(1 << 17)		/* PDC Abort Source */
> -#define		AT91_MC_MST2		(1 << 18)		/* UHP Abort Source */
> -#define		AT91_MC_MST3		(1 << 19)		/* EMAC Abort Source */
> -#define		AT91_MC_SVMST0		(1 << 24)		/* Saved ARM920T Abort Source */
> -#define		AT91_MC_SVMST1		(1 << 25)		/* Saved PDC Abort Source */
> -#define		AT91_MC_SVMST2		(1 << 26)		/* Saved UHP Abort Source */
> -#define		AT91_MC_SVMST3		(1 << 27)		/* Saved EMAC Abort Source */
> -
> -#define AT91_MC_AASR		0x08			/* MC Abort Address Status Register */
> -
> -#define AT91_MC_MPR		0x0c			/* MC Master Priority Register */
> -#define		AT91_MPR_MSTP0		(7 <<  0)		/* ARM920T Priority */
> -#define		AT91_MPR_MSTP1		(7 <<  4)		/* PDC Priority */
> -#define		AT91_MPR_MSTP2		(7 <<  8)		/* UHP Priority */
> -#define		AT91_MPR_MSTP3		(7 << 12)		/* EMAC Priority */
> -
> -/* External Bus Interface (EBI) registers */
> -#define AT91_EBI_CSA		0x60			/* Chip Select Assignment Register */
> -#define		AT91_EBI_CS0A		(1 << 0)		/* Chip Select 0 Assignment */
> -#define			AT91_EBI_CS0A_SMC		(0 << 0)
> -#define			AT91_EBI_CS0A_BFC		(1 << 0)
> -#define		AT91_EBI_CS1A		(1 << 1)		/* Chip Select 1 Assignment */
> -#define			AT91_EBI_CS1A_SMC		(0 << 1)
> -#define			AT91_EBI_CS1A_SDRAMC		(1 << 1)
> -#define		AT91_EBI_CS3A		(1 << 3)		/* Chip Select 2 Assignment */
> -#define			AT91_EBI_CS3A_SMC		(0 << 3)
> -#define			AT91_EBI_CS3A_SMC_SMARTMEDIA	(1 << 3)
> -#define		AT91_EBI_CS4A		(1 << 4)		/* Chip Select 3 Assignment */
> -#define			AT91_EBI_CS4A_SMC		(0 << 4)
> -#define			AT91_EBI_CS4A_SMC_COMPACTFLASH	(1 << 4)
> -#define AT91_EBI_CFGR		(AT91_MC + 0x64)	/* Configuration Register */
> -#define		AT91_EBI_DBPUC		(1 << 0)		/* Data Bus Pull-Up Configuration */
> -
> -/* Static Memory Controller (SMC) registers */
> -#define	AT91_SMC_CSR(n)		(0x70 + ((n) * 4))	/* SMC Chip Select Register */
> -#define		AT91_SMC_NWS		(0x7f <<  0)		/* Number of Wait States */
> -#define			AT91_SMC_NWS_(x)	((x) << 0)
> -#define		AT91_SMC_WSEN		(1    <<  7)		/* Wait State Enable */
> -#define		AT91_SMC_TDF		(0xf  <<  8)		/* Data Float Time */
> -#define			AT91_SMC_TDF_(x)	((x) << 8)
> -#define		AT91_SMC_BAT		(1    << 12)		/* Byte Access Type */
> -#define		AT91_SMC_DBW		(3    << 13)		/* Data Bus Width */
> -#define			AT91_SMC_DBW_16		(1 << 13)
> -#define			AT91_SMC_DBW_8		(2 << 13)
> -#define		AT91_SMC_DPR		(1 << 15)		/* Data Read Protocol */
> -#define		AT91_SMC_ACSS		(3 << 16)		/* Address to Chip Select Setup */
> -#define			AT91_SMC_ACSS_STD	(0 << 16)
> -#define			AT91_SMC_ACSS_1		(1 << 16)
> -#define			AT91_SMC_ACSS_2		(2 << 16)
> -#define			AT91_SMC_ACSS_3		(3 << 16)
> -#define		AT91_SMC_RWSETUP	(7 << 24)		/* Read & Write Signal Time Setup */
> -#define			AT91_SMC_RWSETUP_(x)	((x) << 24)
> -#define		AT91_SMC_RWHOLD		(7 << 28)		/* Read & Write Signal Hold Time */
> -#define			AT91_SMC_RWHOLD_(x)	((x) << 28)
> -
> -/* Burst Flash Controller register */
> -#define AT91_BFC_MR		0xc0			/* Mode Register */
> -#define		AT91_BFC_BFCOM		(3   <<  0)		/* Burst Flash Controller Operating Mode */
> -#define			AT91_BFC_BFCOM_DISABLED	(0 << 0)
> -#define			AT91_BFC_BFCOM_ASYNC	(1 << 0)
> -#define			AT91_BFC_BFCOM_BURST	(2 << 0)
> -#define		AT91_BFC_BFCC		(3   <<  2)		/* Burst Flash Controller Clock */
> -#define			AT91_BFC_BFCC_MCK	(1 << 2)
> -#define			AT91_BFC_BFCC_DIV2	(2 << 2)
> -#define			AT91_BFC_BFCC_DIV4	(3 << 2)
> -#define		AT91_BFC_AVL		(0xf <<  4)		/* Address Valid Latency */
> -#define		AT91_BFC_PAGES		(7   <<  8)		/* Page Size */
> -#define			AT91_BFC_PAGES_NO_PAGE	(0 << 8)
> -#define			AT91_BFC_PAGES_16	(1 << 8)
> -#define			AT91_BFC_PAGES_32	(2 << 8)
> -#define			AT91_BFC_PAGES_64	(3 << 8)
> -#define			AT91_BFC_PAGES_128	(4 << 8)
> -#define			AT91_BFC_PAGES_256	(5 << 8)
> -#define			AT91_BFC_PAGES_512	(6 << 8)
> -#define			AT91_BFC_PAGES_1024	(7 << 8)
> -#define		AT91_BFC_OEL		(3   << 12)		/* Output Enable Latency */
> -#define		AT91_BFC_BAAEN		(1   << 16)		/* Burst Address Advance Enable */
> -#define		AT91_BFC_BFOEH		(1   << 17)		/* Burst Flash Output Enable Handling */
> -#define		AT91_BFC_MUXEN		(1   << 18)		/* Multiplexed Bus Enable */
> -#define		AT91_BFC_RDYEN		(1   << 19)		/* Ready Enable Mode */
> -
> -#endif
> diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
> index ecd875a91d52..3fcf8810f14e 100644
> --- a/arch/arm/mach-at91/pm.h
> +++ b/arch/arm/mach-at91/pm.h
> @@ -13,7 +13,19 @@
>  
>  #include <asm/proc-fns.h>
>  
> -#include <mach/at91_ramc.h>
> +#include <linux/mfd/syscon/atmel-mc.h>
> +#include <soc/at91/at91sam9_ddrsdr.h>
> +#include <soc/at91/at91sam9_sdramc.h>
> +
> +#ifndef __ASSEMBLY__
> +extern void __iomem *at91_ramc_base[];
> +
> +#define at91_ramc_read(id, field) \
> +	__raw_readl(at91_ramc_base[id] + field)
> +
> +#define at91_ramc_write(id, field, value) \
> +	__raw_writel(value, at91_ramc_base[id] + field)
> +#endif
>  
>  #define AT91_MEMCTRL_MC		0
>  #define AT91_MEMCTRL_SDRAMC	1
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index fda4e0164ed7..0d95f488b47a 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
> @@ -13,7 +13,6 @@
>   */
>  #include <linux/linkage.h>
>  #include <linux/clk/at91_pmc.h>
> -#include <mach/at91_ramc.h>
>  #include "pm.h"
>  
>  #define	SRAMC_SELF_FRESH_ACTIVE		0x01
> 


-- 
Nicolas Ferre


From nicolas.ferre at atmel.com  Mon Mar 23 03:11:35 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 11:11:35 +0100
Subject: [PATCH 03/10] ata: at91: use syscon to configure the smc
In-Reply-To: <1426545886-19162-4-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-4-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE6D7.6000107@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> Use syscon/regmap to configure the smc. This allows to avoid using
> at91sam9_smc.h and to compile the driver in a multiplatform configuration.
> 
> The driver will still not probe until the proper DT bindings are added.

Alexandre, just for the record, can you describe the DT node that will
match this?
Is it one that will be added to
Documentation/devicetree/bindings/mfd/atmel-smc.txt?

...

> Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
> ---
>  drivers/ata/Kconfig     |  1 -
>  drivers/ata/pata_at91.c | 92 ++++++++++++++++++++++++++++++++++++++-----------
>  2 files changed, 71 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index 5f601553b9b0..a3a13605a9c4 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -835,7 +835,6 @@ config PATA_AT32
>  config PATA_AT91
>  	tristate "PATA support for AT91SAM9260"
>  	depends on ARM && SOC_AT91SAM9
> -	depends on !ARCH_MULTIPLATFORM
>  	help
>  	  This option enables support for IDE devices on the Atmel AT91SAM9260 SoC.
>  
> diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
> index 9e85937d36a9..ace0a4de3449 100644
> --- a/drivers/ata/pata_at91.c
> +++ b/drivers/ata/pata_at91.c
> @@ -24,11 +24,13 @@
>  #include <linux/ata.h>
>  #include <linux/clk.h>
>  #include <linux/libata.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/mfd/syscon/atmel-smc.h>
>  #include <linux/platform_device.h>
>  #include <linux/ata_platform.h>
>  #include <linux/platform_data/atmel.h>
> +#include <linux/regmap.h>
>  
> -#include <mach/at91sam9_smc.h>
>  #include <asm/gpio.h>
>  
>  #define DRV_NAME		"pata_at91"
> @@ -57,6 +59,15 @@ struct smc_range {
>  	int max;
>  };
>  
> +struct regmap *smc;
> +
> +struct at91sam9_smc_generic_fields {
> +	struct regmap_field *setup;
> +	struct regmap_field *pulse;
> +	struct regmap_field *cycle;
> +	struct regmap_field *mode;
> +} fields;
> +
>  /**
>   * adjust_smc_value - adjust value for one of SMC registers.
>   * @value: adjusted value
> @@ -206,7 +217,6 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
>  {
>  	int ret = 0;
>  	int use_iordy;
> -	struct sam9_smc_config smc;
>  	unsigned int t6z;         /* data tristate time in ns */
>  	unsigned int cycle;       /* SMC Cycle width in MCK ticks */
>  	unsigned int setup;       /* SMC Setup width in MCK ticks */
> @@ -244,19 +254,21 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
>  
>  	dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
>  
> -	/* SMC Setup Register */
> -	smc.nwe_setup = smc.nrd_setup = setup;
> -	smc.ncs_write_setup = smc.ncs_read_setup = 0;
> -	/* SMC Pulse Register */
> -	smc.nwe_pulse = smc.nrd_pulse = pulse;
> -	smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
> -	/* SMC Cycle Register */
> -	smc.write_cycle = smc.read_cycle = cycle;
> -	/* SMC Mode Register*/
> -	smc.tdf_cycles = tdf_cycles;
> -	smc.mode = info->mode;
> -
> -	sam9_smc_configure(0, info->cs, &smc);
> +	regmap_fields_write(fields.setup, info->cs,
> +			    AT91SAM9_SMC_NRDSETUP(setup) |
> +			    AT91SAM9_SMC_NWESETUP(setup) |
> +			    AT91SAM9_SMC_NCS_NRDSETUP(0) |
> +			    AT91SAM9_SMC_NCS_WRSETUP(0));
> +	regmap_fields_write(fields.pulse, info->cs,
> +			    AT91SAM9_SMC_NRDPULSE(pulse) |
> +			    AT91SAM9_SMC_NWEPULSE(pulse) |
> +			    AT91SAM9_SMC_NCS_NRDPULSE(cs_pulse) |
> +			    AT91SAM9_SMC_NCS_WRPULSE(cs_pulse));
> +	regmap_fields_write(fields.cycle, info->cs,
> +			    AT91SAM9_SMC_NRDCYCLE(cycle) |
> +			    AT91SAM9_SMC_NWECYCLE(cycle));
> +	regmap_fields_write(fields.mode, info->cs, info->mode |
> +			    AT91_SMC_TDF_(tdf_cycles));
>  }
>  
>  static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
> @@ -280,21 +292,21 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
>  {
>  	struct at91_ide_info *info = dev->link->ap->host->private_data;
>  	unsigned int consumed;
> +	unsigned int mode;
>  	unsigned long flags;
> -	struct sam9_smc_config smc;
>  
>  	local_irq_save(flags);
> -	sam9_smc_read_mode(0, info->cs, &smc);
> +	regmap_fields_read(fields.mode, info->cs, &mode);
>  
>  	/* set 16bit mode before writing data */
> -	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
> -	sam9_smc_write_mode(0, info->cs, &smc);
> +	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
> +			    AT91_SMC_DBW_16);
>  
>  	consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
>  
>  	/* restore 8bit mode after data is written */
> -	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
> -	sam9_smc_write_mode(0, info->cs, &smc);
> +	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
> +			    AT91_SMC_DBW_8);
>  
>  	local_irq_restore(flags);
>  	return consumed;
> @@ -312,6 +324,36 @@ static struct ata_port_operations pata_at91_port_ops = {
>  	.cable_detect	= ata_cable_40wire,
>  };
>  
> +static int at91sam9_smc_fields_init(struct device *dev)
> +{
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	field.id_size = 8;
> +	field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
> +
> +	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
> +	fields.setup = devm_regmap_field_alloc(dev, smc, field);
> +	if (IS_ERR(fields.setup))
> +		return PTR_ERR(fields.setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
> +	fields.pulse = devm_regmap_field_alloc(dev, smc, field);
> +	if (IS_ERR(fields.pulse))
> +		return PTR_ERR(fields.pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
> +	fields.cycle = devm_regmap_field_alloc(dev, smc, field);
> +	if (IS_ERR(fields.cycle))
> +		return PTR_ERR(fields.cycle);
> +
> +	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
> +	fields.mode = devm_regmap_field_alloc(dev, smc, field);
> +	if (IS_ERR(fields.mode))
> +		return PTR_ERR(fields.mode);
> +
> +	return 0;
> +}
> +
>  static int pata_at91_probe(struct platform_device *pdev)
>  {
>  	struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
> @@ -341,6 +383,14 @@ static int pata_at91_probe(struct platform_device *pdev)
>  
>  	irq = board->irq_pin;
>  
> +	smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");

... yes, regarding this string "atmel,smc": what will it match?

Thanks, bye.

> +	if (IS_ERR(smc))
> +		return PTR_ERR(smc);
> +
> +	ret = at91sam9_smc_fields_init(dev);
> +	if (ret < 0)
> +		return ret;
> +
>  	/* init ata host */
>  
>  	host = ata_host_alloc(dev, 1);
> 


-- 
Nicolas Ferre


From nicolas.ferre at atmel.com  Mon Mar 23 03:14:35 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 11:14:35 +0100
Subject: [PATCH 00/10] ARM: at91 cleanups for 4.1 #2
In-Reply-To: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE78B.6090900@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> Hi,
> 
> This patch set finishes the clean up of the mach-at91 directory.
> 
> It fixed the remaining two drivers (at91_cf and pata_at91) so that they compile
> in a multiplatform configuration.
> 
> Then it removes the uneeded headers.
> 
> 
> Alexandre Belloni (9):
>   ARM: at91/pm: move the standby functions to pm.c
>   ARM: at91/pm: move AT91_MEMCTRL_* to pm.h

Ok, I only take the first 2 patches of this series for now.

The rest looks good as well, but I need more insight and the review from
Lee to go forward.

Thanks, bye.


>   ata: at91: use syscon to configure the smc
>   ARM: at91: drop sam9_smc.c
>   ARM: at91: declare the at91rm9200 memory controller as a syscon
>   pcmcia: at91_cf: Use syscon to configure the MC/smc
>   ARM: at91/pm: use the atmel-mc syscon defines
>   ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
>   ARM: at91: remove at91rm9200_sdramc.h
> 
> Boris Brezillon (1):
>   mfd: syscon: Add Atmel MC (Memory Controller) registers definition
> 
>  .../devicetree/bindings/arm/atmel-at91.txt         |   2 +-
>  arch/arm/boot/dts/at91rm9200.dtsi                  |   2 +-
>  arch/arm/mach-at91/Makefile                        |   5 -
>  arch/arm/mach-at91/include/mach/at91_ramc.h        |  32 -----
>  arch/arm/mach-at91/include/mach/at91rm9200_mc.h    | 116 -----------------
>  arch/arm/mach-at91/include/mach/at91sam9_smc.h     |  98 --------------
>  arch/arm/mach-at91/pm.c                            |  91 ++++++++++++-
>  arch/arm/mach-at91/pm.h                            | 110 +++-------------
>  arch/arm/mach-at91/pm_suspend.S                    |   3 +-
>  arch/arm/mach-at91/sam9_smc.c                      | 136 -------------------
>  arch/arm/mach-at91/sam9_smc.h                      |  11 --
>  drivers/ata/Kconfig                                |   1 -
>  drivers/ata/pata_at91.c                            |  92 ++++++++++---
>  drivers/pcmcia/Kconfig                             |   1 -
>  drivers/pcmcia/at91_cf.c                           |  25 ++--
>  include/linux/mfd/syscon/atmel-mc.h                | 144 +++++++++++++++++++++
>  include/soc/at91/at91rm9200_sdramc.h               |  63 ---------
>  17 files changed, 339 insertions(+), 593 deletions(-)
>  delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
>  delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
>  delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9_smc.h
>  delete mode 100644 arch/arm/mach-at91/sam9_smc.c
>  delete mode 100644 arch/arm/mach-at91/sam9_smc.h
>  create mode 100644 include/linux/mfd/syscon/atmel-mc.h
>  delete mode 100644 include/soc/at91/at91rm9200_sdramc.h
> 


-- 
Nicolas Ferre


From nicolas.ferre at atmel.com  Mon Mar 23 03:14:52 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 11:14:52 +0100
Subject: [PATCH 01/10] ARM: at91/pm: move the standby functions to pm.c
In-Reply-To: <1426545886-19162-2-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-2-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE79C.6050305@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> The standby functions are now only used in pm.c, move them there.
> 
> Also, they are not inlined as a pointer to those functions is passed to the
> cpuidle driver.
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>

Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>
> ---
>  arch/arm/mach-at91/pm.c | 89 +++++++++++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-at91/pm.h | 92 -------------------------------------------------
>  2 files changed, 89 insertions(+), 92 deletions(-)
> 
> diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
> index f93a735ba327..5062699cbb12 100644
> --- a/arch/arm/mach-at91/pm.c
> +++ b/arch/arm/mach-at91/pm.c
> @@ -222,6 +222,95 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
>  		at91_cpuidle_device.dev.platform_data = at91_standby;
>  }
>  
> +/*
> + * The AT91RM9200 goes into self-refresh mode with this command, and will
> + * terminate self-refresh automatically on the next SDRAM access.
> + *
> + * Self-refresh mode is exited as soon as a memory access is made, but we don't
> + * know for sure when that happens. However, we need to restore the low-power
> + * mode if it was enabled before going idle. Restoring low-power mode while
> + * still in self-refresh is "not recommended", but seems to work.
> + */
> +static void at91rm9200_standby(void)
> +{
> +	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
> +
> +	asm volatile(
> +		"b    1f\n\t"
> +		".align    5\n\t"
> +		"1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
> +		"    str    %0, [%1, %2]\n\t"
> +		"    str    %3, [%1, %4]\n\t"
> +		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
> +		"    str    %5, [%1, %2]"
> +		:
> +		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
> +		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
> +		  "r" (lpr));
> +}
> +
> +/* We manage both DDRAM/SDRAM controllers, we need more than one value to
> + * remember.
> + */
> +static void at91_ddr_standby(void)
> +{
> +	/* Those two values allow us to delay self-refresh activation
> +	 * to the maximum. */
> +	u32 lpr0, lpr1 = 0;
> +	u32 saved_lpr0, saved_lpr1 = 0;
> +
> +	if (at91_ramc_base[1]) {
> +		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
> +		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
> +		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
> +	}
> +
> +	saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
> +	lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
> +	lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
> +
> +	/* self-refresh mode now */
> +	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
> +	if (at91_ramc_base[1])
> +		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
> +
> +	cpu_do_idle();
> +
> +	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
> +	if (at91_ramc_base[1])
> +		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
> +}
> +
> +/* We manage both DDRAM/SDRAM controllers, we need more than one value to
> + * remember.
> + */
> +static void at91sam9_sdram_standby(void)
> +{
> +	u32 lpr0, lpr1 = 0;
> +	u32 saved_lpr0, saved_lpr1 = 0;
> +
> +	if (at91_ramc_base[1]) {
> +		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
> +		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
> +		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
> +	}
> +
> +	saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
> +	lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
> +	lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
> +
> +	/* self-refresh mode now */
> +	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
> +	if (at91_ramc_base[1])
> +		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
> +
> +	cpu_do_idle();
> +
> +	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
> +	if (at91_ramc_base[1])
> +		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
> +}
> +
>  static const struct of_device_id ramc_ids[] __initconst = {
>  	{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
>  	{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
> diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
> index dcacfa1ad3fa..3223967d3460 100644
> --- a/arch/arm/mach-at91/pm.h
> +++ b/arch/arm/mach-at91/pm.h
> @@ -23,96 +23,4 @@
>  
>  #define	AT91_PM_SLOW_CLOCK	0x01
>  
> -/*
> - * The AT91RM9200 goes into self-refresh mode with this command, and will
> - * terminate self-refresh automatically on the next SDRAM access.
> - *
> - * Self-refresh mode is exited as soon as a memory access is made, but we don't
> - * know for sure when that happens. However, we need to restore the low-power
> - * mode if it was enabled before going idle. Restoring low-power mode while
> - * still in self-refresh is "not recommended", but seems to work.
> - */
> -
> -#ifndef __ASSEMBLY__
> -static inline void at91rm9200_standby(void)
> -{
> -	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
> -
> -	asm volatile(
> -		"b    1f\n\t"
> -		".align    5\n\t"
> -		"1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
> -		"    str    %0, [%1, %2]\n\t"
> -		"    str    %3, [%1, %4]\n\t"
> -		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
> -		"    str    %5, [%1, %2]"
> -		:
> -		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
> -		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
> -		  "r" (lpr));
> -}
> -
> -/* We manage both DDRAM/SDRAM controllers, we need more than one value to
> - * remember.
> - */
> -static inline void at91_ddr_standby(void)
> -{
> -	/* Those two values allow us to delay self-refresh activation
> -	 * to the maximum. */
> -	u32 lpr0, lpr1 = 0;
> -	u32 saved_lpr0, saved_lpr1 = 0;
> -
> -	if (at91_ramc_base[1]) {
> -		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
> -		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
> -		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
> -	}
> -
> -	saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
> -	lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
> -	lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
> -
> -	/* self-refresh mode now */
> -	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
> -	if (at91_ramc_base[1])
> -		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
> -
> -	cpu_do_idle();
> -
> -	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
> -	if (at91_ramc_base[1])
> -		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
> -}
> -
> -/* We manage both DDRAM/SDRAM controllers, we need more than one value to
> - * remember.
> - */
> -static inline void at91sam9_sdram_standby(void)
> -{
> -	u32 lpr0, lpr1 = 0;
> -	u32 saved_lpr0, saved_lpr1 = 0;
> -
> -	if (at91_ramc_base[1]) {
> -		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
> -		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
> -		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
> -	}
> -
> -	saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
> -	lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
> -	lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
> -
> -	/* self-refresh mode now */
> -	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
> -	if (at91_ramc_base[1])
> -		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
> -
> -	cpu_do_idle();
> -
> -	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
> -	if (at91_ramc_base[1])
> -		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
> -}
> -
> -#endif
>  #endif
> 


-- 
Nicolas Ferre


From nicolas.ferre at atmel.com  Mon Mar 23 03:15:03 2015
From: nicolas.ferre at atmel.com (Nicolas Ferre)
Date: Mon, 23 Mar 2015 11:15:03 +0100
Subject: [PATCH 02/10] ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
In-Reply-To: <1426545886-19162-3-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-3-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <550FE7A7.9050900@atmel.com>

Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> the AT91_MEMCTRL_* defines are only used by the pm code, move them to pm.h
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>

Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>
> ---
>  arch/arm/mach-at91/include/mach/at91_ramc.h | 4 ----
>  arch/arm/mach-at91/pm.h                     | 4 ++++
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
> index e4492b151fee..493bc486e858 100644
> --- a/arch/arm/mach-at91/include/mach/at91_ramc.h
> +++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
> @@ -21,10 +21,6 @@ extern void __iomem *at91_ramc_base[];
>  .extern at91_ramc_base
>  #endif
>  
> -#define AT91_MEMCTRL_MC		0
> -#define AT91_MEMCTRL_SDRAMC	1
> -#define AT91_MEMCTRL_DDRSDR	2
> -
>  #include <soc/at91/at91rm9200_sdramc.h>
>  #include <soc/at91/at91sam9_ddrsdr.h>
>  #include <soc/at91/at91sam9_sdramc.h>
> diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
> index 3223967d3460..ecd875a91d52 100644
> --- a/arch/arm/mach-at91/pm.h
> +++ b/arch/arm/mach-at91/pm.h
> @@ -15,6 +15,10 @@
>  
>  #include <mach/at91_ramc.h>
>  
> +#define AT91_MEMCTRL_MC		0
> +#define AT91_MEMCTRL_SDRAMC	1
> +#define AT91_MEMCTRL_DDRSDR	2
> +
>  #define	AT91_PM_MEMTYPE_MASK	0x0f
>  
>  #define	AT91_PM_MODE_OFFSET	4
> 


-- 
Nicolas Ferre


From lee.jones at linaro.org  Mon Mar 23 05:31:39 2015
From: lee.jones at linaro.org (Lee Jones)
Date: Mon, 23 Mar 2015 12:31:39 +0000
Subject: [PATCH 05/10] mfd: syscon: Add Atmel MC (Memory Controller)
 registers definition
In-Reply-To: <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <20150323123139.GC24804@x1>

On Mon, 16 Mar 2015, Alexandre Belloni wrote:

> From: Boris Brezillon <boris.brezillon at free-electrons.com>
> 
> The at91rm9200 SoC embeds a Memory Controller block which is used to
> configure several aspects of the platform:
> - AHB/APB Bus behavior
> - SDRAM Controller
> - EBI (External Bus Interface) and SMC (Static Memory Controller) config
> 
> Those registers might be accessed by different drivers, hence we need to
> define it as a syscon device.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
> ---
>  include/linux/mfd/syscon/atmel-mc.h | 144 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 144 insertions(+)
>  create mode 100644 include/linux/mfd/syscon/atmel-mc.h
> 
> diff --git a/include/linux/mfd/syscon/atmel-mc.h b/include/linux/mfd/syscon/atmel-mc.h
> new file mode 100644
> index 000000000000..cb7d9fe89e44
> --- /dev/null
> +++ b/include/linux/mfd/syscon/atmel-mc.h
> @@ -0,0 +1,144 @@
> +/*
> + * Copyright (C) 2005 Ivan Kokshaysky
> + * Copyright (C) SAN People
> + *
> + * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals
> + * registers.
> + * Based on AT91RM9200 datasheet revision E.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_MFD_SYSCON_ATMEL_MC_H_
> +#define _LINUX_MFD_SYSCON_ATMEL_MC_H_
> +
> +/* Memory Controller */
> +#define AT91_MC_RCR			0x00
> +#define AT91_MC_RCB			BIT(0)
> +
> +#define AT91_MC_ASR			0x04
> +#define AT91_MC_UNADD			BIT(0)
> +#define AT91_MC_MISADD			BIT(1)
> +#define AT91_MC_ABTSZ			GENMASK(9, 8)
> +#define AT91_MC_ABTSZ_BYTE		(0 << 8)
> +#define AT91_MC_ABTSZ_HALFWORD		(1 << 8)
> +#define AT91_MC_ABTSZ_WORD		(2 << 8)
> +#define AT91_MC_ABTTYP			GENMASK(11, 10)
> +#define AT91_MC_ABTTYP_DATAREAD		(0 << 10)
> +#define AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
> +#define AT91_MC_ABTTYP_FETCH		(2 << 10)
> +#define AT91_MC_MST(n)			BIT(16 + (n))
> +#define AT91_MC_SVMST(n)		BIT(24 + (n))
> +
> +#define AT91_MC_AASR			0x08
> +
> +#define AT91_MC_MPR			0x0c
> +#define AT91_MPR_MSTP(n)		GENMASK(2 + ((x) * 4), ((x) * 4))
> +
> +/* External Bus Interface (EBI) registers */
> +#define AT91_MC_EBI_CSA			0x60
> +#define AT91_MC_EBI_CS(n)		BIT(x)
> +#define AT91_MC_EBI_NUM_CS		8
> +
> +#define AT91_MC_EBI_CFGR		0x64
> +#define AT91_MC_EBI_DBPUC		BIT(0)
> +
> +/* Static Memory Controller (SMC) registers */
> +#define	AT91_MC_SMC_CSR(n)		(0x70 + ((n) * 4))

Nit: Tab here.

> +#define AT91_MC_SMC_NWS			GENMASK(6, 0)
> +#define AT91_MC_SMC_NWS_(x)		((x) << 0)
> +#define AT91_MC_SMC_WSEN		BIT(7)
> +#define AT91_MC_SMC_TDF			GENMASK(11, 8)
> +#define AT91_MC_SMC_TDF_(x)		((x) << 8)
> +#define AT91_MC_SMC_TDF_MAX		0xf
> +#define AT91_MC_SMC_BAT			BIT(12)
> +#define AT91_MC_SMC_DBW			GENMASK(14, 13)
> +#define AT91_MC_SMC_DBW_16		(1 << 13)
> +#define AT91_MC_SMC_DBW_8		(2 << 13)
> +#define AT91_MC_SMC_DPR			BIT(15)
> +#define AT91_MC_SMC_ACSS		GENMASK(17, 16)
> +#define AT91_MC_SMC_ACSS_(x)		((x) << 16)
> +#define AT91_MC_SMC_ACSS_MAX		3
> +#define AT91_MC_SMC_RWSETUP		GENMASK(26, 24)
> +#define AT91_MC_SMC_RWSETUP_(x)		((x) << 24)
> +#define AT91_MC_SMC_RWHOLD		GENMASK(30, 28)
> +#define AT91_MC_SMC_RWHOLD_(x)		((x) << 28)
> +#define AT91_MC_SMC_RWHOLDSETUP_MAX	7
> +
> +/* SDRAM Controller registers */
> +#define AT91_MC_SDRAMC_MR		0x90
> +#define AT91_MC_SDRAMC_MODE		GENMASK(3, 0)
> +#define AT91_MC_SDRAMC_MODE_NORMAL	(0 << 0)
> +#define AT91_MC_SDRAMC_MODE_NOP		(1 << 0)
> +#define AT91_MC_SDRAMC_MODE_PRECHARGE	(2 << 0)
> +#define AT91_MC_SDRAMC_MODE_LMR		(3 << 0)
> +#define AT91_MC_SDRAMC_MODE_REFRESH	(4 << 0)
> +#define AT91_MC_SDRAMC_DBW_16		BIT(4)
> +
> +#define AT91_MC_SDRAMC_TR		0x94
> +#define AT91_MC_SDRAMC_COUNT		GENMASK(11, 0)
> +
> +#define AT91_MC_SDRAMC_CR		0x98
> +#define AT91_MC_SDRAMC_NC		GENMASK(1, 0)
> +#define AT91_MC_SDRAMC_NC_8		(0 << 0)
> +#define AT91_MC_SDRAMC_NC_9		(1 << 0)
> +#define AT91_MC_SDRAMC_NC_10		(2 << 0)
> +#define AT91_MC_SDRAMC_NC_11		(3 << 0)
> +#define AT91_MC_SDRAMC_NR		GENMASK(3, 2)
> +#define AT91_MC_SDRAMC_NR_11		(0 << 2)
> +#define AT91_MC_SDRAMC_NR_12		(1 << 2)
> +#define AT91_MC_SDRAMC_NR_13		(2 << 2)
> +#define	AT91_MC_SDRAMC_NB		BIT(4)

Nit: Tab here.

> +#define AT91_MC_SDRAMC_NB_2		(0 << 4)
> +#define AT91_MC_SDRAMC_NB_4		(1 << 4)
> +#define AT91_MC_SDRAMC_CAS		GENMASK(6, 5)
> +#define AT91_MC_SDRAMC_CAS_2		(2 << 5)
> +#define AT91_MC_SDRAMC_TWR		GENMASK(10,  7)
> +#define AT91_MC_SDRAMC_TRC		GENMASK(14, 11)
> +#define AT91_MC_SDRAMC_TRP		GENMASK(18, 15)
> +#define AT91_MC_SDRAMC_TRCD		GENMASK(22, 19)
> +#define AT91_MC_SDRAMC_TRAS		GENMASK(26, 23)
> +#define AT91_MC_SDRAMC_TXSR		GENMASK(30, 27)
> +
> +#define AT91_MC_SDRAMC_SRR		0x9c
> +#define AT91_MC_SDRAMC_SRCB		BIT(0)
> +
> +#define AT91_MC_SDRAMC_LPR		0xa0
> +#define AT91_MC_SDRAMC_LPCB		BIT(0)
> +
> +#define AT91_MC_SDRAMC_IER		0xa4
> +#define AT91_MC_SDRAMC_IDR		0xa8
> +#define AT91_MC_SDRAMC_IMR		0xac
> +#define AT91_MC_SDRAMC_ISR		0xb0
> +#define AT91_MC_SDRAMC_RES		BIT(0)
> +
> +/* Burst Flash Controller register */
> +#define AT91_MC_BFC_MR			0xc0
> +#define AT91_MC_BFC_BFCOM		GENMASK(1, 0)
> +#define AT91_MC_BFC_BFCOM_DISABLED	(0 << 0)
> +#define AT91_MC_BFC_BFCOM_ASYNC		(1 << 0)
> +#define AT91_MC_BFC_BFCOM_BURST		(2 << 0)
> +#define AT91_MC_BFC_BFCC		GENMASK(3, 2)
> +#define AT91_MC_BFC_BFCC_MCK		(1 << 2)
> +#define AT91_MC_BFC_BFCC_DIV2		(2 << 2)
> +#define AT91_MC_BFC_BFCC_DIV4		(3 << 2)
> +#define AT91_MC_BFC_AVL			GENMASK(7,  4)
> +#define AT91_MC_BFC_PAGES		GENMASK(10, 8)
> +#define AT91_MC_BFC_PAGES_NO_PAGE	(0 << 8)
> +#define AT91_MC_BFC_PAGES_16		(1 << 8)
> +#define AT91_MC_BFC_PAGES_32		(2 << 8)
> +#define AT91_MC_BFC_PAGES_64		(3 << 8)
> +#define AT91_MC_BFC_PAGES_128		(4 << 8)
> +#define AT91_MC_BFC_PAGES_256		(5 << 8)
> +#define AT91_MC_BFC_PAGES_512		(6 << 8)
> +#define AT91_MC_BFC_PAGES_1024		(7 << 8)
> +#define AT91_MC_BFC_OEL			GENMASK(13, 12)
> +#define AT91_MC_BFC_BAAEN		BIT(16)
> +#define AT91_MC_BFC_BFOEH		BIT(17)
> +#define AT91_MC_BFC_MUXEN		BIT(18)
> +#define AT91_MC_BFC_RDYEN		BIT(19)
> +
> +#endif /* _LINUX_MFD_SYSCON_ATMEL_MC_H_ */

Once fixed, you can apply my:

Acked-by: Lee Jones <lee.jones at linaro.org>


-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog


From lee.jones at linaro.org  Mon Mar 23 07:47:06 2015
From: lee.jones at linaro.org (Lee Jones)
Date: Mon, 23 Mar 2015 14:47:06 +0000
Subject: [PATCH 05/10] mfd: syscon: Add Atmel MC (Memory Controller)
 registers definition
In-Reply-To: <550FE38F.7070701@atmel.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-6-git-send-email-alexandre.belloni@free-electrons.com>
 <550FE38F.7070701@atmel.com>
Message-ID: <20150323144706.GK24804@x1>

On Mon, 23 Mar 2015, Nicolas Ferre wrote:

> Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> > From: Boris Brezillon <boris.brezillon at free-electrons.com>
> > 
> > The at91rm9200 SoC embeds a Memory Controller block which is used to
> > configure several aspects of the platform:
> > - AHB/APB Bus behavior
> > - SDRAM Controller
> > - EBI (External Bus Interface) and SMC (Static Memory Controller) config
> > 
> > Those registers might be accessed by different drivers, hence we need to
> > define it as a syscon device.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
> 
> Alexandre, don't you need to Ack this patch at least?

If he is submitting, he needs his SoB.

> > ---
> >  include/linux/mfd/syscon/atmel-mc.h | 144 ++++++++++++++++++++++++++++++++++++
> >  1 file changed, 144 insertions(+)
> >  create mode 100644 include/linux/mfd/syscon/atmel-mc.h
> > 
> > diff --git a/include/linux/mfd/syscon/atmel-mc.h b/include/linux/mfd/syscon/atmel-mc.h
> > new file mode 100644
> > index 000000000000..cb7d9fe89e44
> > --- /dev/null
> > +++ b/include/linux/mfd/syscon/atmel-mc.h
> > @@ -0,0 +1,144 @@
> > +/*
> > + * Copyright (C) 2005 Ivan Kokshaysky
> > + * Copyright (C) SAN People
> > + *
> > + * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals
> > + * registers.
> > + * Based on AT91RM9200 datasheet revision E.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +
> > +#ifndef _LINUX_MFD_SYSCON_ATMEL_MC_H_
> > +#define _LINUX_MFD_SYSCON_ATMEL_MC_H_
> > +
> > +/* Memory Controller */
> > +#define AT91_MC_RCR			0x00
> > +#define AT91_MC_RCB			BIT(0)
> > +
> > +#define AT91_MC_ASR			0x04
> > +#define AT91_MC_UNADD			BIT(0)
> > +#define AT91_MC_MISADD			BIT(1)
> > +#define AT91_MC_ABTSZ			GENMASK(9, 8)
> > +#define AT91_MC_ABTSZ_BYTE		(0 << 8)
> > +#define AT91_MC_ABTSZ_HALFWORD		(1 << 8)
> > +#define AT91_MC_ABTSZ_WORD		(2 << 8)
> > +#define AT91_MC_ABTTYP			GENMASK(11, 10)
> > +#define AT91_MC_ABTTYP_DATAREAD		(0 << 10)
> > +#define AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
> > +#define AT91_MC_ABTTYP_FETCH		(2 << 10)
> > +#define AT91_MC_MST(n)			BIT(16 + (n))
> > +#define AT91_MC_SVMST(n)		BIT(24 + (n))
> > +
> > +#define AT91_MC_AASR			0x08
> > +
> > +#define AT91_MC_MPR			0x0c
> > +#define AT91_MPR_MSTP(n)		GENMASK(2 + ((x) * 4), ((x) * 4))
> > +
> > +/* External Bus Interface (EBI) registers */
> > +#define AT91_MC_EBI_CSA			0x60
> > +#define AT91_MC_EBI_CS(n)		BIT(x)
> > +#define AT91_MC_EBI_NUM_CS		8
> > +
> > +#define AT91_MC_EBI_CFGR		0x64
> > +#define AT91_MC_EBI_DBPUC		BIT(0)
> > +
> > +/* Static Memory Controller (SMC) registers */
> > +#define	AT91_MC_SMC_CSR(n)		(0x70 + ((n) * 4))
> > +#define AT91_MC_SMC_NWS			GENMASK(6, 0)
> > +#define AT91_MC_SMC_NWS_(x)		((x) << 0)
> > +#define AT91_MC_SMC_WSEN		BIT(7)
> > +#define AT91_MC_SMC_TDF			GENMASK(11, 8)
> > +#define AT91_MC_SMC_TDF_(x)		((x) << 8)
> > +#define AT91_MC_SMC_TDF_MAX		0xf
> > +#define AT91_MC_SMC_BAT			BIT(12)
> > +#define AT91_MC_SMC_DBW			GENMASK(14, 13)
> > +#define AT91_MC_SMC_DBW_16		(1 << 13)
> > +#define AT91_MC_SMC_DBW_8		(2 << 13)
> > +#define AT91_MC_SMC_DPR			BIT(15)
> > +#define AT91_MC_SMC_ACSS		GENMASK(17, 16)
> > +#define AT91_MC_SMC_ACSS_(x)		((x) << 16)
> > +#define AT91_MC_SMC_ACSS_MAX		3
> > +#define AT91_MC_SMC_RWSETUP		GENMASK(26, 24)
> > +#define AT91_MC_SMC_RWSETUP_(x)		((x) << 24)
> > +#define AT91_MC_SMC_RWHOLD		GENMASK(30, 28)
> > +#define AT91_MC_SMC_RWHOLD_(x)		((x) << 28)
> > +#define AT91_MC_SMC_RWHOLDSETUP_MAX	7
> > +
> > +/* SDRAM Controller registers */
> > +#define AT91_MC_SDRAMC_MR		0x90
> > +#define AT91_MC_SDRAMC_MODE		GENMASK(3, 0)
> > +#define AT91_MC_SDRAMC_MODE_NORMAL	(0 << 0)
> > +#define AT91_MC_SDRAMC_MODE_NOP		(1 << 0)
> > +#define AT91_MC_SDRAMC_MODE_PRECHARGE	(2 << 0)
> > +#define AT91_MC_SDRAMC_MODE_LMR		(3 << 0)
> > +#define AT91_MC_SDRAMC_MODE_REFRESH	(4 << 0)
> > +#define AT91_MC_SDRAMC_DBW_16		BIT(4)
> > +
> > +#define AT91_MC_SDRAMC_TR		0x94
> > +#define AT91_MC_SDRAMC_COUNT		GENMASK(11, 0)
> > +
> > +#define AT91_MC_SDRAMC_CR		0x98
> > +#define AT91_MC_SDRAMC_NC		GENMASK(1, 0)
> > +#define AT91_MC_SDRAMC_NC_8		(0 << 0)
> > +#define AT91_MC_SDRAMC_NC_9		(1 << 0)
> > +#define AT91_MC_SDRAMC_NC_10		(2 << 0)
> > +#define AT91_MC_SDRAMC_NC_11		(3 << 0)
> > +#define AT91_MC_SDRAMC_NR		GENMASK(3, 2)
> > +#define AT91_MC_SDRAMC_NR_11		(0 << 2)
> > +#define AT91_MC_SDRAMC_NR_12		(1 << 2)
> > +#define AT91_MC_SDRAMC_NR_13		(2 << 2)
> > +#define	AT91_MC_SDRAMC_NB		BIT(4)
> > +#define AT91_MC_SDRAMC_NB_2		(0 << 4)
> > +#define AT91_MC_SDRAMC_NB_4		(1 << 4)
> > +#define AT91_MC_SDRAMC_CAS		GENMASK(6, 5)
> > +#define AT91_MC_SDRAMC_CAS_2		(2 << 5)
> > +#define AT91_MC_SDRAMC_TWR		GENMASK(10,  7)
> > +#define AT91_MC_SDRAMC_TRC		GENMASK(14, 11)
> > +#define AT91_MC_SDRAMC_TRP		GENMASK(18, 15)
> > +#define AT91_MC_SDRAMC_TRCD		GENMASK(22, 19)
> > +#define AT91_MC_SDRAMC_TRAS		GENMASK(26, 23)
> > +#define AT91_MC_SDRAMC_TXSR		GENMASK(30, 27)
> > +
> > +#define AT91_MC_SDRAMC_SRR		0x9c
> > +#define AT91_MC_SDRAMC_SRCB		BIT(0)
> > +
> > +#define AT91_MC_SDRAMC_LPR		0xa0
> > +#define AT91_MC_SDRAMC_LPCB		BIT(0)
> > +
> > +#define AT91_MC_SDRAMC_IER		0xa4
> > +#define AT91_MC_SDRAMC_IDR		0xa8
> > +#define AT91_MC_SDRAMC_IMR		0xac
> > +#define AT91_MC_SDRAMC_ISR		0xb0
> > +#define AT91_MC_SDRAMC_RES		BIT(0)
> > +
> > +/* Burst Flash Controller register */
> > +#define AT91_MC_BFC_MR			0xc0
> > +#define AT91_MC_BFC_BFCOM		GENMASK(1, 0)
> > +#define AT91_MC_BFC_BFCOM_DISABLED	(0 << 0)
> > +#define AT91_MC_BFC_BFCOM_ASYNC		(1 << 0)
> > +#define AT91_MC_BFC_BFCOM_BURST		(2 << 0)
> > +#define AT91_MC_BFC_BFCC		GENMASK(3, 2)
> > +#define AT91_MC_BFC_BFCC_MCK		(1 << 2)
> > +#define AT91_MC_BFC_BFCC_DIV2		(2 << 2)
> > +#define AT91_MC_BFC_BFCC_DIV4		(3 << 2)
> > +#define AT91_MC_BFC_AVL			GENMASK(7,  4)
> > +#define AT91_MC_BFC_PAGES		GENMASK(10, 8)
> > +#define AT91_MC_BFC_PAGES_NO_PAGE	(0 << 8)
> > +#define AT91_MC_BFC_PAGES_16		(1 << 8)
> > +#define AT91_MC_BFC_PAGES_32		(2 << 8)
> > +#define AT91_MC_BFC_PAGES_64		(3 << 8)
> > +#define AT91_MC_BFC_PAGES_128		(4 << 8)
> > +#define AT91_MC_BFC_PAGES_256		(5 << 8)
> > +#define AT91_MC_BFC_PAGES_512		(6 << 8)
> > +#define AT91_MC_BFC_PAGES_1024		(7 << 8)
> > +#define AT91_MC_BFC_OEL			GENMASK(13, 12)
> > +#define AT91_MC_BFC_BAAEN		BIT(16)
> > +#define AT91_MC_BFC_BFOEH		BIT(17)
> > +#define AT91_MC_BFC_MUXEN		BIT(18)
> > +#define AT91_MC_BFC_RDYEN		BIT(19)
> > +
> > +#endif /* _LINUX_MFD_SYSCON_ATMEL_MC_H_ */
> > 
> 
> I'm not a big fan of the use of BIT/GENMASK macros in mix with the <<
> operator, but I guess it can be done anyway, so I'm okay:
> Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>

Please ensure Nicolas' Ack is applied to your next submission.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog


From alexandre.belloni at free-electrons.com  Mon Mar 23 09:38:57 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 17:38:57 +0100
Subject: [PATCH 03/10] ata: at91: use syscon to configure the smc
In-Reply-To: <550FE6D7.6000107@atmel.com>
References: <1426545886-19162-1-git-send-email-alexandre.belloni@free-electrons.com>
 <1426545886-19162-4-git-send-email-alexandre.belloni@free-electrons.com>
 <550FE6D7.6000107@atmel.com>
Message-ID: <20150323163857.GA20732@piout.net>

On 23/03/2015 at 11:11:35 +0100, Nicolas Ferre wrote :
> Le 16/03/2015 23:44, Alexandre Belloni a ?crit :
> > Use syscon/regmap to configure the smc. This allows to avoid using
> > at91sam9_smc.h and to compile the driver in a multiplatform configuration.
> > 
> > The driver will still not probe until the proper DT bindings are added.
> 
> Alexandre, just for the record, can you describe the DT node that will
> match this?
> Is it one that will be added to
> Documentation/devicetree/bindings/mfd/atmel-smc.txt?
> 

I believe it should be documented when the full binding will be defined.
This binding will include a mandatory property:
 atmel,smc: phandle to the smc

and will look like:
 atmel,smc = <&smc>;


-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:06 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:06 +0100
Subject: [PATCH v2 0/9] ARM: at91 cleanups for 4.1 #2
Message-ID: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>

Hi,

This patch set finishes the clean up of the mach-at91 directory.

It fixes the remaining two drivers (at91_cf and pata_at91) so that they compile
in a multiplatform configuration.

Then it removes the uneeded headers.

Changes in v2:
 - remove incorrect tabs in atmel-mc.h
 - collected acks
 - Added a new patch to remove Makefile.boot
 - improved the commit massage of the first patch

Alexandre Belloni (8):
  ata: at91: use syscon to configure the smc
  ARM: at91: drop sam9_smc.c
  ARM: at91: declare the at91rm9200 memory controller as a syscon
  pcmcia: at91_cf: Use syscon to configure the MC/smc
  ARM: at91/pm: use the atmel-mc syscon defines
  ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
  ARM: at91: remove at91rm9200_sdramc.h
  ARM: at91: remove useless Makefile.boot

Boris Brezillon (1):
  mfd: syscon: Add Atmel MC (Memory Controller) registers definition

 .../devicetree/bindings/arm/atmel-at91.txt         |   2 +-
 arch/arm/boot/dts/at91rm9200.dtsi                  |   2 +-
 arch/arm/mach-at91/Makefile                        |   5 -
 arch/arm/mach-at91/Makefile.boot                   |   8 --
 arch/arm/mach-at91/include/mach/at91_ramc.h        |  28 ----
 arch/arm/mach-at91/include/mach/at91rm9200_mc.h    | 116 -----------------
 arch/arm/mach-at91/include/mach/at91sam9_smc.h     |  98 --------------
 arch/arm/mach-at91/pm.c                            |   8 +-
 arch/arm/mach-at91/pm.h                            |  14 +-
 arch/arm/mach-at91/pm_suspend.S                    |   3 +-
 arch/arm/mach-at91/sam9_smc.c                      | 136 -------------------
 arch/arm/mach-at91/sam9_smc.h                      |  11 --
 drivers/ata/Kconfig                                |   1 -
 drivers/ata/pata_at91.c                            |  92 ++++++++++---
 drivers/pcmcia/Kconfig                             |   1 -
 drivers/pcmcia/at91_cf.c                           |  25 ++--
 include/linux/mfd/syscon/atmel-mc.h                | 144 +++++++++++++++++++++
 include/soc/at91/at91rm9200_sdramc.h               |  63 ---------
 18 files changed, 249 insertions(+), 508 deletions(-)
 delete mode 100644 arch/arm/mach-at91/Makefile.boot
 delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9_smc.h
 delete mode 100644 arch/arm/mach-at91/sam9_smc.c
 delete mode 100644 arch/arm/mach-at91/sam9_smc.h
 create mode 100644 include/linux/mfd/syscon/atmel-mc.h
 delete mode 100644 include/soc/at91/at91rm9200_sdramc.h

-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:07 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:07 +0100
Subject: [PATCH v2 1/9] ata: at91: use syscon to configure the smc
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-2-git-send-email-alexandre.belloni@free-electrons.com>

Use syscon/regmap to configure the smc. This allows to avoid using
at91sam9_smc.h and to compile the driver in a multiplatform configuration.

The driver will still not probe until the proper DT bindings are added. That
binding will include an atmel,smc property that is a phandle to the SMC the CF
controller is connected to.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 drivers/ata/Kconfig     |  1 -
 drivers/ata/pata_at91.c | 92 ++++++++++++++++++++++++++++++++++++++-----------
 2 files changed, 71 insertions(+), 22 deletions(-)

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 5f601553b9b0..a3a13605a9c4 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -835,7 +835,6 @@ config PATA_AT32
 config PATA_AT91
 	tristate "PATA support for AT91SAM9260"
 	depends on ARM && SOC_AT91SAM9
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables support for IDE devices on the Atmel AT91SAM9260 SoC.
 
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 9e85937d36a9..ace0a4de3449 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -24,11 +24,13 @@
 #include <linux/ata.h>
 #include <linux/clk.h>
 #include <linux/libata.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-smc.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
 #include <linux/platform_data/atmel.h>
+#include <linux/regmap.h>
 
-#include <mach/at91sam9_smc.h>
 #include <asm/gpio.h>
 
 #define DRV_NAME		"pata_at91"
@@ -57,6 +59,15 @@ struct smc_range {
 	int max;
 };
 
+struct regmap *smc;
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+} fields;
+
 /**
  * adjust_smc_value - adjust value for one of SMC registers.
  * @value: adjusted value
@@ -206,7 +217,6 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
 {
 	int ret = 0;
 	int use_iordy;
-	struct sam9_smc_config smc;
 	unsigned int t6z;         /* data tristate time in ns */
 	unsigned int cycle;       /* SMC Cycle width in MCK ticks */
 	unsigned int setup;       /* SMC Setup width in MCK ticks */
@@ -244,19 +254,21 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
 
 	dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
 
-	/* SMC Setup Register */
-	smc.nwe_setup = smc.nrd_setup = setup;
-	smc.ncs_write_setup = smc.ncs_read_setup = 0;
-	/* SMC Pulse Register */
-	smc.nwe_pulse = smc.nrd_pulse = pulse;
-	smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
-	/* SMC Cycle Register */
-	smc.write_cycle = smc.read_cycle = cycle;
-	/* SMC Mode Register*/
-	smc.tdf_cycles = tdf_cycles;
-	smc.mode = info->mode;
-
-	sam9_smc_configure(0, info->cs, &smc);
+	regmap_fields_write(fields.setup, info->cs,
+			    AT91SAM9_SMC_NRDSETUP(setup) |
+			    AT91SAM9_SMC_NWESETUP(setup) |
+			    AT91SAM9_SMC_NCS_NRDSETUP(0) |
+			    AT91SAM9_SMC_NCS_WRSETUP(0));
+	regmap_fields_write(fields.pulse, info->cs,
+			    AT91SAM9_SMC_NRDPULSE(pulse) |
+			    AT91SAM9_SMC_NWEPULSE(pulse) |
+			    AT91SAM9_SMC_NCS_NRDPULSE(cs_pulse) |
+			    AT91SAM9_SMC_NCS_WRPULSE(cs_pulse));
+	regmap_fields_write(fields.cycle, info->cs,
+			    AT91SAM9_SMC_NRDCYCLE(cycle) |
+			    AT91SAM9_SMC_NWECYCLE(cycle));
+	regmap_fields_write(fields.mode, info->cs, info->mode |
+			    AT91_SMC_TDF_(tdf_cycles));
 }
 
 static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -280,21 +292,21 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
 {
 	struct at91_ide_info *info = dev->link->ap->host->private_data;
 	unsigned int consumed;
+	unsigned int mode;
 	unsigned long flags;
-	struct sam9_smc_config smc;
 
 	local_irq_save(flags);
-	sam9_smc_read_mode(0, info->cs, &smc);
+	regmap_fields_read(fields.mode, info->cs, &mode);
 
 	/* set 16bit mode before writing data */
-	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
-	sam9_smc_write_mode(0, info->cs, &smc);
+	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
+			    AT91_SMC_DBW_16);
 
 	consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
 
 	/* restore 8bit mode after data is written */
-	smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
-	sam9_smc_write_mode(0, info->cs, &smc);
+	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
+			    AT91_SMC_DBW_8);
 
 	local_irq_restore(flags);
 	return consumed;
@@ -312,6 +324,36 @@ static struct ata_port_operations pata_at91_port_ops = {
 	.cable_detect	= ata_cable_40wire,
 };
 
+static int at91sam9_smc_fields_init(struct device *dev)
+{
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	field.id_size = 8;
+	field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
+	fields.setup = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.setup))
+		return PTR_ERR(fields.setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
+	fields.pulse = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.pulse))
+		return PTR_ERR(fields.pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
+	fields.cycle = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.cycle))
+		return PTR_ERR(fields.cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
+	fields.mode = devm_regmap_field_alloc(dev, smc, field);
+	if (IS_ERR(fields.mode))
+		return PTR_ERR(fields.mode);
+
+	return 0;
+}
+
 static int pata_at91_probe(struct platform_device *pdev)
 {
 	struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
@@ -341,6 +383,14 @@ static int pata_at91_probe(struct platform_device *pdev)
 
 	irq = board->irq_pin;
 
+	smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");
+	if (IS_ERR(smc))
+		return PTR_ERR(smc);
+
+	ret = at91sam9_smc_fields_init(dev);
+	if (ret < 0)
+		return ret;
+
 	/* init ata host */
 
 	host = ata_host_alloc(dev, 1);
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:10 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:10 +0100
Subject: [PATCH v2 4/9] ARM: at91: declare the at91rm9200 memory controller as
 a syscon
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-5-git-send-email-alexandre.belloni@free-electrons.com>

The at91rm9200 memory controller is not simply an SDRAM controller. It also
controls the EBI (External Bus Interface), the SMC (Static Memory Controller)and
the Burst Flash Controller.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 Documentation/devicetree/bindings/arm/atmel-at91.txt | 2 +-
 arch/arm/boot/dts/at91rm9200.dtsi                    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 2e99b5b57350..424ac8cbfa08 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -98,7 +98,7 @@ Example:
 	};
 
 RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc",
+- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
 			"atmel,at91sam9260-sdramc",
 			"atmel,at91sam9g45-ddramc",
 			"atmel,sama5d3-ddramc",
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 4fb333bd1f85..6d0fa9b87f46 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -92,7 +92,7 @@
 			};
 
 			ramc0: ramc at ffffff00 {
-				compatible = "atmel,at91rm9200-sdramc";
+				compatible = "atmel,at91rm9200-sdramc", "syscon";
 				reg = <0xffffff00 0x100>;
 			};
 
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:09 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:09 +0100
Subject: [PATCH v2 3/9] mfd: syscon: Add Atmel MC (Memory Controller)
 registers definition
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-4-git-send-email-alexandre.belloni@free-electrons.com>

From: Boris Brezillon <boris.brezillon at free-electrons.com>

The at91rm9200 SoC embeds a Memory Controller block which is used to
configure several aspects of the platform:
- AHB/APB Bus behavior
- SDRAM Controller
- EBI (External Bus Interface) and SMC (Static Memory Controller) config

Those registers might be accessed by different drivers, hence we need to
define it as a syscon device.

Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
Acked-by: Lee Jones <lee.jones at linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>
---
 include/linux/mfd/syscon/atmel-mc.h | 144 ++++++++++++++++++++++++++++++++++++
 1 file changed, 144 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-mc.h

diff --git a/include/linux/mfd/syscon/atmel-mc.h b/include/linux/mfd/syscon/atmel-mc.h
new file mode 100644
index 000000000000..afd9b8f1e363
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-mc.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals
+ * registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MC_H_
+#define _LINUX_MFD_SYSCON_ATMEL_MC_H_
+
+/* Memory Controller */
+#define AT91_MC_RCR			0x00
+#define AT91_MC_RCB			BIT(0)
+
+#define AT91_MC_ASR			0x04
+#define AT91_MC_UNADD			BIT(0)
+#define AT91_MC_MISADD			BIT(1)
+#define AT91_MC_ABTSZ			GENMASK(9, 8)
+#define AT91_MC_ABTSZ_BYTE		(0 << 8)
+#define AT91_MC_ABTSZ_HALFWORD		(1 << 8)
+#define AT91_MC_ABTSZ_WORD		(2 << 8)
+#define AT91_MC_ABTTYP			GENMASK(11, 10)
+#define AT91_MC_ABTTYP_DATAREAD		(0 << 10)
+#define AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
+#define AT91_MC_ABTTYP_FETCH		(2 << 10)
+#define AT91_MC_MST(n)			BIT(16 + (n))
+#define AT91_MC_SVMST(n)		BIT(24 + (n))
+
+#define AT91_MC_AASR			0x08
+
+#define AT91_MC_MPR			0x0c
+#define AT91_MPR_MSTP(n)		GENMASK(2 + ((x) * 4), ((x) * 4))
+
+/* External Bus Interface (EBI) registers */
+#define AT91_MC_EBI_CSA			0x60
+#define AT91_MC_EBI_CS(n)		BIT(x)
+#define AT91_MC_EBI_NUM_CS		8
+
+#define AT91_MC_EBI_CFGR		0x64
+#define AT91_MC_EBI_DBPUC		BIT(0)
+
+/* Static Memory Controller (SMC) registers */
+#define AT91_MC_SMC_CSR(n)		(0x70 + ((n) * 4))
+#define AT91_MC_SMC_NWS			GENMASK(6, 0)
+#define AT91_MC_SMC_NWS_(x)		((x) << 0)
+#define AT91_MC_SMC_WSEN		BIT(7)
+#define AT91_MC_SMC_TDF			GENMASK(11, 8)
+#define AT91_MC_SMC_TDF_(x)		((x) << 8)
+#define AT91_MC_SMC_TDF_MAX		0xf
+#define AT91_MC_SMC_BAT			BIT(12)
+#define AT91_MC_SMC_DBW			GENMASK(14, 13)
+#define AT91_MC_SMC_DBW_16		(1 << 13)
+#define AT91_MC_SMC_DBW_8		(2 << 13)
+#define AT91_MC_SMC_DPR			BIT(15)
+#define AT91_MC_SMC_ACSS		GENMASK(17, 16)
+#define AT91_MC_SMC_ACSS_(x)		((x) << 16)
+#define AT91_MC_SMC_ACSS_MAX		3
+#define AT91_MC_SMC_RWSETUP		GENMASK(26, 24)
+#define AT91_MC_SMC_RWSETUP_(x)		((x) << 24)
+#define AT91_MC_SMC_RWHOLD		GENMASK(30, 28)
+#define AT91_MC_SMC_RWHOLD_(x)		((x) << 28)
+#define AT91_MC_SMC_RWHOLDSETUP_MAX	7
+
+/* SDRAM Controller registers */
+#define AT91_MC_SDRAMC_MR		0x90
+#define AT91_MC_SDRAMC_MODE		GENMASK(3, 0)
+#define AT91_MC_SDRAMC_MODE_NORMAL	(0 << 0)
+#define AT91_MC_SDRAMC_MODE_NOP		(1 << 0)
+#define AT91_MC_SDRAMC_MODE_PRECHARGE	(2 << 0)
+#define AT91_MC_SDRAMC_MODE_LMR		(3 << 0)
+#define AT91_MC_SDRAMC_MODE_REFRESH	(4 << 0)
+#define AT91_MC_SDRAMC_DBW_16		BIT(4)
+
+#define AT91_MC_SDRAMC_TR		0x94
+#define AT91_MC_SDRAMC_COUNT		GENMASK(11, 0)
+
+#define AT91_MC_SDRAMC_CR		0x98
+#define AT91_MC_SDRAMC_NC		GENMASK(1, 0)
+#define AT91_MC_SDRAMC_NC_8		(0 << 0)
+#define AT91_MC_SDRAMC_NC_9		(1 << 0)
+#define AT91_MC_SDRAMC_NC_10		(2 << 0)
+#define AT91_MC_SDRAMC_NC_11		(3 << 0)
+#define AT91_MC_SDRAMC_NR		GENMASK(3, 2)
+#define AT91_MC_SDRAMC_NR_11		(0 << 2)
+#define AT91_MC_SDRAMC_NR_12		(1 << 2)
+#define AT91_MC_SDRAMC_NR_13		(2 << 2)
+#define AT91_MC_SDRAMC_NB		BIT(4)
+#define AT91_MC_SDRAMC_NB_2		(0 << 4)
+#define AT91_MC_SDRAMC_NB_4		(1 << 4)
+#define AT91_MC_SDRAMC_CAS		GENMASK(6, 5)
+#define AT91_MC_SDRAMC_CAS_2		(2 << 5)
+#define AT91_MC_SDRAMC_TWR		GENMASK(10,  7)
+#define AT91_MC_SDRAMC_TRC		GENMASK(14, 11)
+#define AT91_MC_SDRAMC_TRP		GENMASK(18, 15)
+#define AT91_MC_SDRAMC_TRCD		GENMASK(22, 19)
+#define AT91_MC_SDRAMC_TRAS		GENMASK(26, 23)
+#define AT91_MC_SDRAMC_TXSR		GENMASK(30, 27)
+
+#define AT91_MC_SDRAMC_SRR		0x9c
+#define AT91_MC_SDRAMC_SRCB		BIT(0)
+
+#define AT91_MC_SDRAMC_LPR		0xa0
+#define AT91_MC_SDRAMC_LPCB		BIT(0)
+
+#define AT91_MC_SDRAMC_IER		0xa4
+#define AT91_MC_SDRAMC_IDR		0xa8
+#define AT91_MC_SDRAMC_IMR		0xac
+#define AT91_MC_SDRAMC_ISR		0xb0
+#define AT91_MC_SDRAMC_RES		BIT(0)
+
+/* Burst Flash Controller register */
+#define AT91_MC_BFC_MR			0xc0
+#define AT91_MC_BFC_BFCOM		GENMASK(1, 0)
+#define AT91_MC_BFC_BFCOM_DISABLED	(0 << 0)
+#define AT91_MC_BFC_BFCOM_ASYNC		(1 << 0)
+#define AT91_MC_BFC_BFCOM_BURST		(2 << 0)
+#define AT91_MC_BFC_BFCC		GENMASK(3, 2)
+#define AT91_MC_BFC_BFCC_MCK		(1 << 2)
+#define AT91_MC_BFC_BFCC_DIV2		(2 << 2)
+#define AT91_MC_BFC_BFCC_DIV4		(3 << 2)
+#define AT91_MC_BFC_AVL			GENMASK(7,  4)
+#define AT91_MC_BFC_PAGES		GENMASK(10, 8)
+#define AT91_MC_BFC_PAGES_NO_PAGE	(0 << 8)
+#define AT91_MC_BFC_PAGES_16		(1 << 8)
+#define AT91_MC_BFC_PAGES_32		(2 << 8)
+#define AT91_MC_BFC_PAGES_64		(3 << 8)
+#define AT91_MC_BFC_PAGES_128		(4 << 8)
+#define AT91_MC_BFC_PAGES_256		(5 << 8)
+#define AT91_MC_BFC_PAGES_512		(6 << 8)
+#define AT91_MC_BFC_PAGES_1024		(7 << 8)
+#define AT91_MC_BFC_OEL			GENMASK(13, 12)
+#define AT91_MC_BFC_BAAEN		BIT(16)
+#define AT91_MC_BFC_BFOEH		BIT(17)
+#define AT91_MC_BFC_MUXEN		BIT(18)
+#define AT91_MC_BFC_RDYEN		BIT(19)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MC_H_ */
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:08 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:08 +0100
Subject: [PATCH v2 2/9] ARM: at91: drop sam9_smc.c
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-3-git-send-email-alexandre.belloni@free-electrons.com>

sam9_smc.c has no users anymore, remove it along with both sam9_smc.h and
mach/at91sam9_smc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/Makefile                    |   2 -
 arch/arm/mach-at91/include/mach/at91sam9_smc.h |  98 ------------------
 arch/arm/mach-at91/sam9_smc.c                  | 136 -------------------------
 arch/arm/mach-at91/sam9_smc.h                  |  11 --
 4 files changed, 247 deletions(-)
 delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9_smc.h
 delete mode 100644 arch/arm/mach-at91/sam9_smc.c
 delete mode 100644 arch/arm/mach-at91/sam9_smc.h

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 06a4cefd33a0..3586d977e99d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -6,8 +6,6 @@ asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
 
 obj-y		:= soc.o
 
-obj-$(CONFIG_SOC_AT91SAM9)	+= sam9_smc.o
-
 # CPU-specific support
 obj-$(CONFIG_SOC_AT91RM9200)	+= at91rm9200.o
 obj-$(CONFIG_SOC_AT91SAM9)	+= at91sam9.o
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
deleted file mode 100644
index ff54a0ce90e3..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9_smc.h
- *
- * Copyright (C) 2007 Andrew Victor
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Static Memory Controllers (SMC) - System peripherals registers.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9_SMC_H
-#define AT91SAM9_SMC_H
-
-#ifndef __ASSEMBLY__
-struct sam9_smc_config {
-	/* Setup register */
-	u8 ncs_read_setup;
-	u8 nrd_setup;
-	u8 ncs_write_setup;
-	u8 nwe_setup;
-
-	/* Pulse register */
-	u8 ncs_read_pulse;
-	u8 nrd_pulse;
-	u8 ncs_write_pulse;
-	u8 nwe_pulse;
-
-	/* Cycle register */
-	u16 read_cycle;
-	u16 write_cycle;
-
-	/* Mode register */
-	u32 mode;
-	u8 tdf_cycles:4;
-};
-
-extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
-#endif
-
-#define AT91_SMC_SETUP		0x00				/* Setup Register for CS n */
-#define		AT91_SMC_NWESETUP	(0x3f << 0)			/* NWE Setup Length */
-#define			AT91_SMC_NWESETUP_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRSETUP	(0x3f << 8)			/* NCS Setup Length in Write Access */
-#define			AT91_SMC_NCS_WRSETUP_(x)	((x) << 8)
-#define		AT91_SMC_NRDSETUP	(0x3f << 16)			/* NRD Setup Length */
-#define			AT91_SMC_NRDSETUP_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDSETUP	(0x3f << 24)			/* NCS Setup Length in Read Access */
-#define			AT91_SMC_NCS_RDSETUP_(x)	((x) << 24)
-
-#define AT91_SMC_PULSE		0x04				/* Pulse Register for CS n */
-#define		AT91_SMC_NWEPULSE	(0x7f <<  0)			/* NWE Pulse Length */
-#define			AT91_SMC_NWEPULSE_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRPULSE	(0x7f <<  8)			/* NCS Pulse Length in Write Access */
-#define			AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
-#define		AT91_SMC_NRDPULSE	(0x7f << 16)			/* NRD Pulse Length */
-#define			AT91_SMC_NRDPULSE_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDPULSE	(0x7f << 24)			/* NCS Pulse Length in Read Access */
-#define			AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
-
-#define AT91_SMC_CYCLE		0x08				/* Cycle Register for CS n */
-#define		AT91_SMC_NWECYCLE	(0x1ff << 0 )			/* Total Write Cycle Length */
-#define			AT91_SMC_NWECYCLE_(x)	((x) << 0)
-#define		AT91_SMC_NRDCYCLE	(0x1ff << 16)			/* Total Read Cycle Length */
-#define			AT91_SMC_NRDCYCLE_(x)	((x) << 16)
-
-#define AT91_SMC_MODE		0x0c				/* Mode Register for CS n */
-#define		AT91_SMC_READMODE	(1 <<  0)			/* Read Mode */
-#define		AT91_SMC_WRITEMODE	(1 <<  1)			/* Write Mode */
-#define		AT91_SMC_EXNWMODE	(3 <<  4)			/* NWAIT Mode */
-#define			AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
-#define			AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
-#define			AT91_SMC_EXNWMODE_READY		(3 << 4)
-#define		AT91_SMC_BAT		(1 <<  8)			/* Byte Access Type */
-#define			AT91_SMC_BAT_SELECT		(0 << 8)
-#define			AT91_SMC_BAT_WRITE		(1 << 8)
-#define		AT91_SMC_DBW		(3 << 12)			/* Data Bus Width */
-#define			AT91_SMC_DBW_8			(0 << 12)
-#define			AT91_SMC_DBW_16			(1 << 12)
-#define			AT91_SMC_DBW_32			(2 << 12)
-#define		AT91_SMC_TDF		(0xf << 16)			/* Data Float Time. */
-#define			AT91_SMC_TDF_(x)		((x) << 16)
-#define		AT91_SMC_TDFMODE	(1 << 20)			/* TDF Optimization - Enabled */
-#define		AT91_SMC_PMEN		(1 << 24)			/* Page Mode Enabled */
-#define		AT91_SMC_PS		(3 << 28)			/* Page Size */
-#define			AT91_SMC_PS_4			(0 << 28)
-#define			AT91_SMC_PS_8			(1 << 28)
-#define			AT91_SMC_PS_16			(2 << 28)
-#define			AT91_SMC_PS_32			(3 << 28)
-
-#endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
deleted file mode 100644
index 826315af6d11..000000000000
--- a/arch/arm/mach-at91/sam9_smc.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/sam9_smc.c
- *
- * Copyright (C) 2008 Andrew Victor
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#include <mach/at91sam9_smc.h>
-
-#include "sam9_smc.h"
-
-
-#define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x10))
-
-static void __iomem *smc_base_addr[2];
-
-static void sam9_smc_cs_write_mode(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	__raw_writel(config->mode
-		   | AT91_SMC_TDF_(config->tdf_cycles),
-		   base + AT91_SMC_MODE);
-}
-
-void sam9_smc_write_mode(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_write_mode);
-
-static void sam9_smc_cs_configure(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-
-	/* Setup register */
-	__raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
-		   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
-		   | AT91_SMC_NRDSETUP_(config->nrd_setup)
-		   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
-		   base + AT91_SMC_SETUP);
-
-	/* Pulse register */
-	__raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
-		   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
-		   | AT91_SMC_NRDPULSE_(config->nrd_pulse)
-		   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
-		   base + AT91_SMC_PULSE);
-
-	/* Cycle register */
-	__raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
-		   | AT91_SMC_NRDCYCLE_(config->read_cycle),
-		   base + AT91_SMC_CYCLE);
-
-	/* Mode register */
-	sam9_smc_cs_write_mode(base, config);
-}
-
-void sam9_smc_configure(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_configure);
-
-static void sam9_smc_cs_read_mode(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	u32 val = __raw_readl(base + AT91_SMC_MODE);
-
-	config->mode = (val & ~AT91_SMC_NWECYCLE);
-	config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
-}
-
-void sam9_smc_read_mode(int id, int cs,
-					struct sam9_smc_config *config)
-{
-	sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
-}
-EXPORT_SYMBOL_GPL(sam9_smc_read_mode);
-
-static void sam9_smc_cs_read(void __iomem *base,
-					struct sam9_smc_config *config)
-{
-	u32 val;
-
-	/* Setup register */
-	val = __raw_readl(base + AT91_SMC_SETUP);
-
-	config->nwe_setup = val & AT91_SMC_NWESETUP;
-	config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
-	config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
-	config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
-
-	/* Pulse register */
-	val = __raw_readl(base + AT91_SMC_PULSE);
-
-	config->nwe_pulse = val & AT91_SMC_NWEPULSE;
-	config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
-	config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
-	config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
-
-	/* Cycle register */
-	val = __raw_readl(base + AT91_SMC_CYCLE);
-
-	config->write_cycle = val & AT91_SMC_NWECYCLE;
-	config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
-
-	/* Mode register */
-	sam9_smc_cs_read_mode(base, config);
-}
-
-void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
-{
-	sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
-}
-
-void __init at91sam9_ioremap_smc(int id, u32 addr)
-{
-	if (id > 1) {
-		pr_warn("%s: id > 2\n", __func__);
-		return;
-	}
-	smc_base_addr[id] = ioremap(addr, 512);
-	if (!smc_base_addr[id])
-		pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
-}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
deleted file mode 100644
index 3e52dcd4a59f..000000000000
--- a/arch/arm/mach-at91/sam9_smc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/sam9_smc.
- *
- * Copyright (C) 2008 Andrew Victor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-extern void __init at91sam9_ioremap_smc(int id, u32 addr);
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:12 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:12 +0100
Subject: [PATCH v2 6/9] ARM: at91/pm: use the atmel-mc syscon defines
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-7-git-send-email-alexandre.belloni@free-electrons.com>

Use the defines from atmel-mc.h instead of at91rm9200_sdramc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/include/mach/at91_ramc.h | 2 +-
 arch/arm/mach-at91/pm.c                     | 8 ++++----
 arch/arm/mach-at91/pm_suspend.S             | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
index 493bc486e858..39547496d4b0 100644
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -21,7 +21,7 @@ extern void __iomem *at91_ramc_base[];
 .extern at91_ramc_base
 #endif
 
-#include <soc/at91/at91rm9200_sdramc.h>
+#include <linux/mfd/syscon/atmel-mc.h>
 #include <soc/at91/at91sam9_ddrsdr.h>
 #include <soc/at91/at91sam9_sdramc.h>
 
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5062699cbb12..1e184767c3be 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -233,7 +233,7 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
  */
 static void at91rm9200_standby(void)
 {
-	u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
+	u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);
 
 	asm volatile(
 		"b    1f\n\t"
@@ -244,8 +244,8 @@ static void at91rm9200_standby(void)
 		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
 		"    str    %5, [%1, %2]"
 		:
-		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
-		  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
+		: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR),
+		  "r" (1), "r" (AT91_MC_SDRAMC_SRR),
 		  "r" (lpr));
 }
 
@@ -414,7 +414,7 @@ void __init at91rm9200_pm_init(void)
 	/*
 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
 	 */
-	at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
+	at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
 
 	at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
 	at91_pm_data.memctrl = AT91_MEMCTRL_MC;
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index bd22b2c8a051..fda4e0164ed7 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -216,7 +216,7 @@ ENTRY(at91_sramc_self_refresh)
 
 	/* Active SDRAM self-refresh mode */
 	mov	r3, #1
-	str	r3, [r2, #AT91RM9200_SDRAMC_SRR]
+	str	r3, [r2, #AT91_MC_SDRAMC_SRR]
 	b	exit_sramc_sf
 
 ddrc_sf:
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:11 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:11 +0100
Subject: [PATCH v2 5/9] pcmcia: at91_cf: Use syscon to configure the MC/smc
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-6-git-send-email-alexandre.belloni@free-electrons.com>

Use syscon/regmap to configure the smc part of the memory controller. This
allows to avoid using mach/at91rm9200_mc.h and mach/at91_ramc.h and to compile
the driver in a multiplatform configuration.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 drivers/pcmcia/Kconfig   |  1 -
 drivers/pcmcia/at91_cf.c | 25 ++++++++++++++-----------
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 075d5cd4c5ab..56ff3dc1235e 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -280,7 +280,6 @@ config AT91_CF
 	tristate "AT91 CompactFlash Controller"
 	depends on PCI
 	depends on PCMCIA && ARCH_AT91
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  Say Y here to support the CompactFlash controller on AT91 chips.
 	  Or choose M to compile the driver as a module named "at91_cf".
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index e7775a41ae5d..87147bcd1655 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -20,16 +20,15 @@
 #include <linux/platform_data/atmel.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-mc.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/of_gpio.h>
+#include <linux/regmap.h>
 
 #include <pcmcia/ss.h>
 
-#include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
-
-
 /*
  * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
  * some other bit in {A24,A22..A11} is nREG to flag memory access
@@ -40,6 +39,8 @@
 #define	CF_IO_PHYS	(1 << 23)
 #define	CF_MEM_PHYS	(0x017ff800)
 
+struct regmap *mc;
+
 /*--------------------------------------------------------------------------*/
 
 struct at91_cf_socket {
@@ -155,10 +156,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
 
 	/*
 	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
-	 */
-	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
-
-	/*
+	 *
 	 * NOTE: this CF controller ignores IOIS16, so we can't really do
 	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
 	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
@@ -169,13 +167,14 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
 	 * CF 3.0 spec table 35 also giving the D8-D15 option.
 	 */
 	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
-		csr |= AT91_SMC_DBW_8;
+		csr = AT91_MC_SMC_DBW_8;
 		dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
 	} else {
-		csr |= AT91_SMC_DBW_16;
+		csr = AT91_MC_SMC_DBW_16;
 		dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
 	}
-	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
+	regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect),
+			   AT91_MC_SMC_DBW, csr);
 
 	io->start = cf->socket.io_offset;
 	io->stop = io->start + SZ_2K - 1;
@@ -236,6 +235,10 @@ static int at91_cf_dt_init(struct platform_device *pdev)
 
 	pdev->dev.platform_data = board;
 
+	mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc");
+	if (IS_ERR(mc))
+		return PTR_ERR(mc);
+
 	return 0;
 }
 #else
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:14 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:14 +0100
Subject: [PATCH v2 8/9] ARM: at91: remove at91rm9200_sdramc.h
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-9-git-send-email-alexandre.belloni@free-electrons.com>

include/soc/at91/at91rm9200_sdramc.h is replaced by
include/linux/mfd/syscon/atmel-smc.h as this is actually a syscon device.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 include/soc/at91/at91rm9200_sdramc.h | 63 ------------------------------------
 1 file changed, 63 deletions(-)
 delete mode 100644 include/soc/at91/at91rm9200_sdramc.h

diff --git a/include/soc/at91/at91rm9200_sdramc.h b/include/soc/at91/at91rm9200_sdramc.h
deleted file mode 100644
index aa047f458f1b..000000000000
--- a/include/soc/at91/at91rm9200_sdramc.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Memory Controllers (SDRAMC only) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_SDRAMC_H
-#define AT91RM9200_SDRAMC_H
-
-/* SDRAM Controller registers */
-#define AT91RM9200_SDRAMC_MR		0x90			/* Mode Register */
-#define		AT91RM9200_SDRAMC_MODE	(0xf << 0)		/* Command Mode */
-#define			AT91RM9200_SDRAMC_MODE_NORMAL		(0 << 0)
-#define			AT91RM9200_SDRAMC_MODE_NOP		(1 << 0)
-#define			AT91RM9200_SDRAMC_MODE_PRECHARGE	(2 << 0)
-#define			AT91RM9200_SDRAMC_MODE_LMR		(3 << 0)
-#define			AT91RM9200_SDRAMC_MODE_REFRESH	(4 << 0)
-#define		AT91RM9200_SDRAMC_DBW		(1   << 4)		/* Data Bus Width */
-#define			AT91RM9200_SDRAMC_DBW_32	(0 << 4)
-#define			AT91RM9200_SDRAMC_DBW_16	(1 << 4)
-
-#define AT91RM9200_SDRAMC_TR		0x94			/* Refresh Timer Register */
-#define		AT91RM9200_SDRAMC_COUNT	(0xfff << 0)		/* Refresh Timer Count */
-
-#define AT91RM9200_SDRAMC_CR		0x98			/* Configuration Register */
-#define		AT91RM9200_SDRAMC_NC		(3   <<  0)		/* Number of Column Bits */
-#define			AT91RM9200_SDRAMC_NC_8	(0 << 0)
-#define			AT91RM9200_SDRAMC_NC_9	(1 << 0)
-#define			AT91RM9200_SDRAMC_NC_10	(2 << 0)
-#define			AT91RM9200_SDRAMC_NC_11	(3 << 0)
-#define		AT91RM9200_SDRAMC_NR		(3   <<  2)		/* Number of Row Bits */
-#define			AT91RM9200_SDRAMC_NR_11	(0 << 2)
-#define			AT91RM9200_SDRAMC_NR_12	(1 << 2)
-#define			AT91RM9200_SDRAMC_NR_13	(2 << 2)
-#define		AT91RM9200_SDRAMC_NB		(1   <<  4)		/* Number of Banks */
-#define			AT91RM9200_SDRAMC_NB_2	(0 << 4)
-#define			AT91RM9200_SDRAMC_NB_4	(1 << 4)
-#define		AT91RM9200_SDRAMC_CAS		(3   <<  5)		/* CAS Latency */
-#define			AT91RM9200_SDRAMC_CAS_2	(2 << 5)
-#define		AT91RM9200_SDRAMC_TWR		(0xf <<  7)		/* Write Recovery Delay */
-#define		AT91RM9200_SDRAMC_TRC		(0xf << 11)		/* Row Cycle Delay */
-#define		AT91RM9200_SDRAMC_TRP		(0xf << 15)		/* Row Precharge Delay */
-#define		AT91RM9200_SDRAMC_TRCD	(0xf << 19)		/* Row to Column Delay */
-#define		AT91RM9200_SDRAMC_TRAS	(0xf << 23)		/* Active to Precharge Delay */
-#define		AT91RM9200_SDRAMC_TXSR	(0xf << 27)		/* Exit Self Refresh to Active Delay */
-
-#define AT91RM9200_SDRAMC_SRR		0x9c			/* Self Refresh Register */
-#define AT91RM9200_SDRAMC_LPR		0xa0			/* Low Power Register */
-#define AT91RM9200_SDRAMC_IER		0xa4			/* Interrupt Enable Register */
-#define AT91RM9200_SDRAMC_IDR		0xa8			/* Interrupt Disable Register */
-#define AT91RM9200_SDRAMC_IMR		0xac			/* Interrupt Mask Register */
-#define AT91RM9200_SDRAMC_ISR		0xb0			/* Interrupt Status Register */
-
-#endif
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:13 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:13 +0100
Subject: [PATCH v2 7/9] ARM: at91: remove mach/at91_ramc.h and
 mach/at91rm9200_mc.h
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-8-git-send-email-alexandre.belloni@free-electrons.com>

mach/at91_ramc.h and mach/at91rm9200_mc.h aren't necessary anymore, remove them.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/Makefile                     |   3 -
 arch/arm/mach-at91/include/mach/at91_ramc.h     |  28 ------
 arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 116 ------------------------
 arch/arm/mach-at91/pm.h                         |  14 ++-
 arch/arm/mach-at91/pm_suspend.S                 |   1 -
 5 files changed, 13 insertions(+), 149 deletions(-)
 delete mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
 delete mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 3586d977e99d..fa4393ab3e7b 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,9 +1,6 @@
 #
 # Makefile for the linux kernel.
 #
-ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-
 obj-y		:= soc.o
 
 # CPU-specific support
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
deleted file mode 100644
index 39547496d4b0..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Header file for the Atmel RAM Controller
- *
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
- *
- * Under GPLv2 only
- */
-
-#ifndef __AT91_RAMC_H__
-#define __AT91_RAMC_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_ramc_base[];
-
-#define at91_ramc_read(id, field) \
-	__raw_readl(at91_ramc_base[id] + field)
-
-#define at91_ramc_write(id, field, value) \
-	__raw_writel(value, at91_ramc_base[id] + field)
-#else
-.extern at91_ramc_base
-#endif
-
-#include <linux/mfd/syscon/atmel-mc.h>
-#include <soc/at91/at91sam9_ddrsdr.h>
-#include <soc/at91/at91sam9_sdramc.h>
-
-#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
deleted file mode 100644
index aeaadfb452af..000000000000
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91rm9200_mc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_MC_H
-#define AT91RM9200_MC_H
-
-/* Memory Controller */
-#define AT91_MC_RCR		0x00			/* MC Remap Control Register */
-#define		AT91_MC_RCB		(1 <<  0)		/* Remap Command Bit */
-
-#define AT91_MC_ASR		0x04			/* MC Abort Status Register */
-#define		AT91_MC_UNADD		(1 <<  0)		/* Undefined Address Abort Status */
-#define		AT91_MC_MISADD		(1 <<  1)		/* Misaligned Address Abort Status */
-#define		AT91_MC_ABTSZ		(3 <<  8)		/* Abort Size Status */
-#define			AT91_MC_ABTSZ_BYTE		(0 << 8)
-#define			AT91_MC_ABTSZ_HALFWORD		(1 << 8)
-#define			AT91_MC_ABTSZ_WORD		(2 << 8)
-#define		AT91_MC_ABTTYP		(3 << 10)		/* Abort Type Status */
-#define			AT91_MC_ABTTYP_DATAREAD		(0 << 10)
-#define			AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
-#define			AT91_MC_ABTTYP_FETCH		(2 << 10)
-#define		AT91_MC_MST0		(1 << 16)		/* ARM920T Abort Source */
-#define		AT91_MC_MST1		(1 << 17)		/* PDC Abort Source */
-#define		AT91_MC_MST2		(1 << 18)		/* UHP Abort Source */
-#define		AT91_MC_MST3		(1 << 19)		/* EMAC Abort Source */
-#define		AT91_MC_SVMST0		(1 << 24)		/* Saved ARM920T Abort Source */
-#define		AT91_MC_SVMST1		(1 << 25)		/* Saved PDC Abort Source */
-#define		AT91_MC_SVMST2		(1 << 26)		/* Saved UHP Abort Source */
-#define		AT91_MC_SVMST3		(1 << 27)		/* Saved EMAC Abort Source */
-
-#define AT91_MC_AASR		0x08			/* MC Abort Address Status Register */
-
-#define AT91_MC_MPR		0x0c			/* MC Master Priority Register */
-#define		AT91_MPR_MSTP0		(7 <<  0)		/* ARM920T Priority */
-#define		AT91_MPR_MSTP1		(7 <<  4)		/* PDC Priority */
-#define		AT91_MPR_MSTP2		(7 <<  8)		/* UHP Priority */
-#define		AT91_MPR_MSTP3		(7 << 12)		/* EMAC Priority */
-
-/* External Bus Interface (EBI) registers */
-#define AT91_EBI_CSA		0x60			/* Chip Select Assignment Register */
-#define		AT91_EBI_CS0A		(1 << 0)		/* Chip Select 0 Assignment */
-#define			AT91_EBI_CS0A_SMC		(0 << 0)
-#define			AT91_EBI_CS0A_BFC		(1 << 0)
-#define		AT91_EBI_CS1A		(1 << 1)		/* Chip Select 1 Assignment */
-#define			AT91_EBI_CS1A_SMC		(0 << 1)
-#define			AT91_EBI_CS1A_SDRAMC		(1 << 1)
-#define		AT91_EBI_CS3A		(1 << 3)		/* Chip Select 2 Assignment */
-#define			AT91_EBI_CS3A_SMC		(0 << 3)
-#define			AT91_EBI_CS3A_SMC_SMARTMEDIA	(1 << 3)
-#define		AT91_EBI_CS4A		(1 << 4)		/* Chip Select 3 Assignment */
-#define			AT91_EBI_CS4A_SMC		(0 << 4)
-#define			AT91_EBI_CS4A_SMC_COMPACTFLASH	(1 << 4)
-#define AT91_EBI_CFGR		(AT91_MC + 0x64)	/* Configuration Register */
-#define		AT91_EBI_DBPUC		(1 << 0)		/* Data Bus Pull-Up Configuration */
-
-/* Static Memory Controller (SMC) registers */
-#define	AT91_SMC_CSR(n)		(0x70 + ((n) * 4))	/* SMC Chip Select Register */
-#define		AT91_SMC_NWS		(0x7f <<  0)		/* Number of Wait States */
-#define			AT91_SMC_NWS_(x)	((x) << 0)
-#define		AT91_SMC_WSEN		(1    <<  7)		/* Wait State Enable */
-#define		AT91_SMC_TDF		(0xf  <<  8)		/* Data Float Time */
-#define			AT91_SMC_TDF_(x)	((x) << 8)
-#define		AT91_SMC_BAT		(1    << 12)		/* Byte Access Type */
-#define		AT91_SMC_DBW		(3    << 13)		/* Data Bus Width */
-#define			AT91_SMC_DBW_16		(1 << 13)
-#define			AT91_SMC_DBW_8		(2 << 13)
-#define		AT91_SMC_DPR		(1 << 15)		/* Data Read Protocol */
-#define		AT91_SMC_ACSS		(3 << 16)		/* Address to Chip Select Setup */
-#define			AT91_SMC_ACSS_STD	(0 << 16)
-#define			AT91_SMC_ACSS_1		(1 << 16)
-#define			AT91_SMC_ACSS_2		(2 << 16)
-#define			AT91_SMC_ACSS_3		(3 << 16)
-#define		AT91_SMC_RWSETUP	(7 << 24)		/* Read & Write Signal Time Setup */
-#define			AT91_SMC_RWSETUP_(x)	((x) << 24)
-#define		AT91_SMC_RWHOLD		(7 << 28)		/* Read & Write Signal Hold Time */
-#define			AT91_SMC_RWHOLD_(x)	((x) << 28)
-
-/* Burst Flash Controller register */
-#define AT91_BFC_MR		0xc0			/* Mode Register */
-#define		AT91_BFC_BFCOM		(3   <<  0)		/* Burst Flash Controller Operating Mode */
-#define			AT91_BFC_BFCOM_DISABLED	(0 << 0)
-#define			AT91_BFC_BFCOM_ASYNC	(1 << 0)
-#define			AT91_BFC_BFCOM_BURST	(2 << 0)
-#define		AT91_BFC_BFCC		(3   <<  2)		/* Burst Flash Controller Clock */
-#define			AT91_BFC_BFCC_MCK	(1 << 2)
-#define			AT91_BFC_BFCC_DIV2	(2 << 2)
-#define			AT91_BFC_BFCC_DIV4	(3 << 2)
-#define		AT91_BFC_AVL		(0xf <<  4)		/* Address Valid Latency */
-#define		AT91_BFC_PAGES		(7   <<  8)		/* Page Size */
-#define			AT91_BFC_PAGES_NO_PAGE	(0 << 8)
-#define			AT91_BFC_PAGES_16	(1 << 8)
-#define			AT91_BFC_PAGES_32	(2 << 8)
-#define			AT91_BFC_PAGES_64	(3 << 8)
-#define			AT91_BFC_PAGES_128	(4 << 8)
-#define			AT91_BFC_PAGES_256	(5 << 8)
-#define			AT91_BFC_PAGES_512	(6 << 8)
-#define			AT91_BFC_PAGES_1024	(7 << 8)
-#define		AT91_BFC_OEL		(3   << 12)		/* Output Enable Latency */
-#define		AT91_BFC_BAAEN		(1   << 16)		/* Burst Address Advance Enable */
-#define		AT91_BFC_BFOEH		(1   << 17)		/* Burst Flash Output Enable Handling */
-#define		AT91_BFC_MUXEN		(1   << 18)		/* Multiplexed Bus Enable */
-#define		AT91_BFC_RDYEN		(1   << 19)		/* Ready Enable Mode */
-
-#endif
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index ecd875a91d52..3fcf8810f14e 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -13,7 +13,19 @@
 
 #include <asm/proc-fns.h>
 
-#include <mach/at91_ramc.h>
+#include <linux/mfd/syscon/atmel-mc.h>
+#include <soc/at91/at91sam9_ddrsdr.h>
+#include <soc/at91/at91sam9_sdramc.h>
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_ramc_base[];
+
+#define at91_ramc_read(id, field) \
+	__raw_readl(at91_ramc_base[id] + field)
+
+#define at91_ramc_write(id, field, value) \
+	__raw_writel(value, at91_ramc_base[id] + field)
+#endif
 
 #define AT91_MEMCTRL_MC		0
 #define AT91_MEMCTRL_SDRAMC	1
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index fda4e0164ed7..0d95f488b47a 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -13,7 +13,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/clk/at91_pmc.h>
-#include <mach/at91_ramc.h>
 #include "pm.h"
 
 #define	SRAMC_SELF_FRESH_ACTIVE		0x01
-- 
2.1.0



From alexandre.belloni at free-electrons.com  Mon Mar 23 12:29:15 2015
From: alexandre.belloni at free-electrons.com (Alexandre Belloni)
Date: Mon, 23 Mar 2015 20:29:15 +0100
Subject: [PATCH v2 9/9] ARM: at91: remove useless Makefile.boot
In-Reply-To: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
References: <1427138955-3617-1-git-send-email-alexandre.belloni@free-electrons.com>
Message-ID: <1427138955-3617-10-git-send-email-alexandre.belloni@free-electrons.com>

Makefile.boot is not used anymore, remove it.

Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>
---
 arch/arm/mach-at91/Makefile.boot | 8 --------
 1 file changed, 8 deletions(-)
 delete mode 100644 arch/arm/mach-at91/Makefile.boot

diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
deleted file mode 100644
index 29ed0fa374ca..000000000000
--- a/arch/arm/mach-at91/Makefile.boot
+++ /dev/null
@@ -1,8 +0,0 @@
-# Note: the following conditions must always be true:
-#   ZRELADDR == virt_to_phys(TEXTADDR)
-#   PARAMS_PHYS must be within 4MB of ZRELADDR
-#   INITRD_PHYS must be in RAM
-
-   zreladdr-y	+= 0x20008000
-params_phys-y	:= 0x20000100
-initrd_phys-y	:= 0x20410000
-- 
2.1.0



From xerofoify at gmail.com  Tue Mar 24 21:24:13 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Wed, 25 Mar 2015 00:24:13 -0400
Subject: [PATCH] pcmcia:Fix memory leaks in the function,
 sa11xx_drv_pcmcia_probe
Message-ID: <1427257453-22159-1-git-send-email-xerofoify@gmail.com>

Fixes memory leaks in the function,sa11xx_drv_pcmcia_probe for
when either clk_get returns a error value  or when we cannot allocate
memory  with the pointer sinfo to memory required for this function
to continue and return successfully. Further more this was caught by
running coccinelle on the lastet kernel tree.

Signed-off-by: Nicholas Krause <xerofoify at gmail.com>
---
 drivers/pcmcia/sa11xx_base.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index cf6de2c..a95ce73 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -223,14 +223,19 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 	struct clk *clk;
 
 	clk = clk_get(dev, NULL);
-	if (IS_ERR(clk))
+	if (IS_ERR(clk)) {
+		clk_put(clk);
 		return PTR_ERR(clk);
+	}
 
 	sa11xx_drv_pcmcia_ops(ops);
 
 	sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
-	if (!sinfo)
+	if (!sinfo) {
+		clk_put(clk);
+		kfree(sinfo);
 		return -ENOMEM;
+	}
 
 	sinfo->nskt = nr;
 	sinfo->clk = clk;
-- 
2.1.0



From Larry.Finger at lwfinger.net  Tue Mar 24 23:11:48 2015
From: Larry.Finger at lwfinger.net (Larry Finger)
Date: Wed, 25 Mar 2015 01:11:48 -0500
Subject: [PATCH] pcmcia:Fix memory leaks in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <1427257453-22159-1-git-send-email-xerofoify@gmail.com>
References: <1427257453-22159-1-git-send-email-xerofoify@gmail.com>
Message-ID: <551251A4.1030501@lwfinger.net>

On 03/24/2015 11:24 PM, Nicholas Krause wrote:
> Fixes memory leaks in the function,sa11xx_drv_pcmcia_probe for
> when either clk_get returns a error value  or when we cannot allocate
> memory  with the pointer sinfo to memory required for this function
> to continue and return successfully. Further more this was caught by
> running coccinelle on the lastet kernel tree.
>
> Signed-off-by: Nicholas Krause <xerofoify at gmail.com>
> ---
>   drivers/pcmcia/sa11xx_base.c | 9 +++++++--
>   1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
> index cf6de2c..a95ce73 100644
> --- a/drivers/pcmcia/sa11xx_base.c
> +++ b/drivers/pcmcia/sa11xx_base.c
> @@ -223,14 +223,19 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
>   	struct clk *clk;
>
>   	clk = clk_get(dev, NULL);
> -	if (IS_ERR(clk))
> +	if (IS_ERR(clk)) {
> +		clk_put(clk);
>   		return PTR_ERR(clk);
> +	}

If the clk_get() failed, then there is no need to use a clk_put(). In addition, 
clk contains an error code, not a valid pointer. This change would crash the 
system every time clk_get() failed.

>
>   	sa11xx_drv_pcmcia_ops(ops);
>
>   	sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
> -	if (!sinfo)
> +	if (!sinfo) {
> +		clk_put(clk);
> +		kfree(sinfo);
>   		return -ENOMEM;

If the memory allocation failed, there is nothing to free. That kfree() call is 
not needed; however, the clk_put() is needed here.

NACK.

Larry


> +	}
>
>   	sinfo->nskt = nr;
>   	sinfo->clk = clk;
>



From xerofoify at gmail.com  Wed Mar 25 04:24:51 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Wed, 25 Mar 2015 07:24:51 -0400
Subject: [PATCH] pcmcia:Fix memory leaks in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <551251A4.1030501@lwfinger.net>
References: <1427257453-22159-1-git-send-email-xerofoify@gmail.com>
 <551251A4.1030501@lwfinger.net>
Message-ID: <2C0DE2B2-4B11-4184-902C-6109EA1717CF@gmail.com>



On March 25, 2015 2:11:48 AM EDT, Larry Finger <Larry.Finger at lwfinger.net> wrote:
>On 03/24/2015 11:24 PM, Nicholas Krause wrote:
>> Fixes memory leaks in the function,sa11xx_drv_pcmcia_probe for
>> when either clk_get returns a error value  or when we cannot allocate
>> memory  with the pointer sinfo to memory required for this function
>> to continue and return successfully. Further more this was caught by
>> running coccinelle on the lastet kernel tree.
>>
>> Signed-off-by: Nicholas Krause <xerofoify at gmail.com>
>> ---
>>   drivers/pcmcia/sa11xx_base.c | 9 +++++++--
>>   1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pcmcia/sa11xx_base.c
>b/drivers/pcmcia/sa11xx_base.c
>> index cf6de2c..a95ce73 100644
>> --- a/drivers/pcmcia/sa11xx_base.c
>> +++ b/drivers/pcmcia/sa11xx_base.c
>> @@ -223,14 +223,19 @@ int sa11xx_drv_pcmcia_probe(struct device *dev,
>struct pcmcia_low_level *ops,
>>   	struct clk *clk;
>>
>>   	clk = clk_get(dev, NULL);
>> -	if (IS_ERR(clk))
>> +	if (IS_ERR(clk)) {
>> +		clk_put(clk);
>>   		return PTR_ERR(clk);
>> +	}
>
>If the clk_get() failed, then there is no need to use a clk_put(). In
>addition, 
>clk contains an error code, not a valid pointer. This change would
>crash the 
>system every time clk_get() failed.
>
>>
>>   	sa11xx_drv_pcmcia_ops(ops);
>>
>>   	sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
>> -	if (!sinfo)
>> +	if (!sinfo) {
>> +		clk_put(clk);
>> +		kfree(sinfo);
>>   		return -ENOMEM;
>
>If the memory allocation failed, there is nothing to free. That kfree()
>call is 
>not needed; however, the clk_put() is needed here.
>
>NACK.
>
>Larry
>
>
>> +	}
>>
>>   	sinfo->nskt = nr;
>>   	sinfo->clk = clk;
>>
Larry, 
Your absolutely right here.  I will send in a v2 with these issues fixed and solved. 
Thanks your time, 
Nick 


-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.


From xerofoify at gmail.com  Wed Mar 25 20:15:52 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Wed, 25 Mar 2015 23:15:52 -0400
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
Message-ID: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>

This fixes the memory found when running  coccinelle on the latest
kernel tree for if we are unable to successfully allocate memory
for the structure pointer,sinfo of type skt_dev_info and need to
clean up the memory already allocated to the clk structure pointer,
clk by calling clk_get on it and freeing the no longer required
mermory for this structure pointer.

Signed-off-by: Nicholas Krause <xerofoify at gmail.com>
---
 drivers/pcmcia/sa11xx_base.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index cf6de2c..457618b 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -229,8 +229,10 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 	sa11xx_drv_pcmcia_ops(ops);
 
 	sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
-	if (!sinfo)
+	if (!sinfo) {
+		clk_get(dev);
 		return -ENOMEM;
+	}
 
 	sinfo->nskt = nr;
 	sinfo->clk = clk;
-- 
2.1.0



From linux at arm.linux.org.uk  Thu Mar 26 02:52:25 2015
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Thu, 26 Mar 2015 09:52:25 +0000
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
Message-ID: <20150326095225.GY8656@n2100.arm.linux.org.uk>

On Wed, Mar 25, 2015 at 11:15:52PM -0400, Nicholas Krause wrote:
> This fixes the memory found when running  coccinelle on the latest

How does this "fix the memory" ?  Is the memory faulty?

> kernel tree for if we are unable to successfully allocate memory
> for the structure pointer,sinfo of type skt_dev_info and need to
> clean up the memory already allocated to the clk structure pointer,
> clk by calling clk_get on it and freeing the no longer required
> mermory for this structure pointer.

This makes no sense.  clk_get() itself doesn't allocate any memory.  As
usual, you act as a mechanical automatom which doesn't understand what
you're doing or you just guess.  I don't care which it is, you are a
danger to the kernel by doing this.  As many other experienced kernel
developers have told you, please stop.

In any case, I'm NAKing your patch as there's better ways to solve this.
That's where experience and research come in.

Nevertheless, thanks for pointing out the oversight, and I notice that
there are a few more cases too.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.


From xerofoify at gmail.com  Thu Mar 26 04:14:38 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Thu, 26 Mar 2015 07:14:38 -0400
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <20150326095225.GY8656@n2100.arm.linux.org.uk>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
Message-ID: <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>



On March 26, 2015 5:52:25 AM EDT, Russell King - ARM Linux <linux at arm.linux.org.uk> wrote:
>On Wed, Mar 25, 2015 at 11:15:52PM -0400, Nicholas Krause wrote:
>> This fixes the memory found when running  coccinelle on the latest
>
>How does this "fix the memory" ?  Is the memory faulty?
>
>> kernel tree for if we are unable to successfully allocate memory
>> for the structure pointer,sinfo of type skt_dev_info and need to
>> clean up the memory already allocated to the clk structure pointer,
>> clk by calling clk_get on it and freeing the no longer required
>> mermory for this structure pointer.
>
>This makes no sense.  clk_get() itself doesn't allocate any memory.  As
>usual, you act as a mechanical automatom which doesn't understand what
>you're doing or you just guess.  I don't care which it is, you are a
>danger to the kernel by doing this.  As many other experienced kernel
>developers have told you, please stop.
>
>In any case, I'm NAKing your patch as there's better ways to solve
>this.
>That's where experience and research come in.
>
>Nevertheless, thanks for pointing out the oversight, and I notice that
>there are a few more cases too.
Very well then I  guess my patch commit message was wrong. 
Nick

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.


From linux at arm.linux.org.uk  Thu Mar 26 04:22:54 2015
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Thu, 26 Mar 2015 11:22:54 +0000
Subject: [PATCH 0/8] sa11x0 PCMCIA updates
Message-ID: <20150326112254.GZ8656@n2100.arm.linux.org.uk>

Here's a collection of patches which cleans up and updates the SA11x0
and PXA2xx socket drivers, particularly converting them to the devm_*
APIs to ensure that resources are properly cleaned up.

I've stopped short of totally converting sa1111_generic as there are
some corner cases where we want to initialise only socket 1, but not
socket 0, which would require further testing to ensure that these
changes are correct.

I will be testing the sa11x0 changes later today, but as I gave most
of my PXA2xx platforms to Robert, I need Robert to test this on the
Lubbock.

 drivers/pcmcia/pxa2xx_base.c    | 17 +++++------------
 drivers/pcmcia/sa1100_generic.c |  2 --
 drivers/pcmcia/sa1111_generic.c | 14 +++++++-------
 drivers/pcmcia/sa11xx_base.c    | 17 ++---------------
 drivers/pcmcia/soc_common.h     |  1 -
 5 files changed, 14 insertions(+), 37 deletions(-)

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.


From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:32 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:32 +0000
Subject: [PATCH 1/8] pcmcia: sa11x0: fix missing clk_put() in sa11x0 socket
 drivers
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5sq-0006Hu-EE@rmk-PC.arm.linux.org.uk>

Fix the lack of clk_put() in sa11xx_base.c's error cleanup paths by
converting the driver to the devm_* API.

Fixes: 86d88bfca475 ("ARM: 8247/2: pcmcia: sa1100: make use of device clock")
Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/sa1100_generic.c | 1 -
 drivers/pcmcia/sa11xx_base.c    | 3 +--
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index 803945259da8..42861cc70158 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -93,7 +93,6 @@ static int sa11x0_drv_pcmcia_remove(struct platform_device *dev)
 	for (i = 0; i < sinfo->nskt; i++)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
 
-	clk_put(sinfo->clk);
 	kfree(sinfo);
 	return 0;
 }
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index cf6de2c2b329..553d70a67f80 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -222,7 +222,7 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 	int i, ret = 0;
 	struct clk *clk;
 
-	clk = clk_get(dev, NULL);
+	clk = devm_clk_get(dev, NULL);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);
 
@@ -251,7 +251,6 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 	if (ret) {
 		while (--i >= 0)
 			soc_pcmcia_remove_one(&sinfo->skt[i]);
-		clk_put(clk);
 		kfree(sinfo);
 	} else {
 		dev_set_drvdata(dev, sinfo);
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:37 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:37 +0000
Subject: [PATCH 2/8] pcmcia: sa11x0: convert memory allocation to devm_* API
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5sv-0006Hz-Ib@rmk-PC.arm.linux.org.uk>

Convert the sa11x0 socket driver memory allocation to use devm_kzalloc()
to simplify the cleanup path.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/sa1100_generic.c | 1 -
 drivers/pcmcia/sa11xx_base.c    | 3 +--
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index 42861cc70158..66acdc85727c 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -93,7 +93,6 @@ static int sa11x0_drv_pcmcia_remove(struct platform_device *dev)
 	for (i = 0; i < sinfo->nskt; i++)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
 
-	kfree(sinfo);
 	return 0;
 }
 
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index 553d70a67f80..6e6336d47d4a 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -228,7 +228,7 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 
 	sa11xx_drv_pcmcia_ops(ops);
 
-	sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
+	sinfo = devm_kzalloc(dev, SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
 	if (!sinfo)
 		return -ENOMEM;
 
@@ -251,7 +251,6 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 	if (ret) {
 		while (--i >= 0)
 			soc_pcmcia_remove_one(&sinfo->skt[i]);
-		kfree(sinfo);
 	} else {
 		dev_set_drvdata(dev, sinfo);
 	}
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:42 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:42 +0000
Subject: [PATCH 3/8] pcmcia: pxa2xx: update socket driver to use
 devm_clk_get() API
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5t0-0006I3-Lb@rmk-PC.arm.linux.org.uk>

Update the pxa2xx socket driver to use the devm_clk_get() API so that
the cleanup paths are simplified.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/pxa2xx_base.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 984a8ff559d8..197c77a64ce0 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -296,17 +296,15 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 		goto err0;
 	}
 
-	clk = clk_get(&dev->dev, NULL);
+	clk = devm_clk_get(&dev->dev, NULL);
 	if (IS_ERR(clk))
 		return -ENODEV;
 
 	pxa2xx_drv_pcmcia_ops(ops);
 
 	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
-	if (!sinfo) {
-		clk_put(clk);
+	if (!sinfo)
 		return -ENOMEM;
-	}
 
 	sinfo->nskt = ops->nr;
 	sinfo->clk = clk;
@@ -332,7 +330,6 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 err1:
 	while (--i >= 0)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
-	clk_put(clk);
 	kfree(sinfo);
 err0:
 	return ret;
@@ -348,7 +345,6 @@ static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
 	for (i = 0; i < sinfo->nskt; i++)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
 
-	clk_put(sinfo->clk);
 	kfree(sinfo);
 	return 0;
 }
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:47 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:47 +0000
Subject: [PATCH 4/8] pcmcia: pxa2xx: convert memory allocation to devm_* API
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5t5-0006I8-Oi@rmk-PC.arm.linux.org.uk>

Convert the pxa2xx socket driver memory allocation to use devm_kzalloc()
to simplify the cleanup path.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/pxa2xx_base.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 197c77a64ce0..dfcf07828605 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -302,7 +302,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 
 	pxa2xx_drv_pcmcia_ops(ops);
 
-	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
+	sinfo = devm_kzalloc(&pdev->dev, SKT_DEV_INFO_SIZE(ops->nr),
+			     GFP_KERNEL);
 	if (!sinfo)
 		return -ENOMEM;
 
@@ -330,7 +331,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 err1:
 	while (--i >= 0)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
-	kfree(sinfo);
+
 err0:
 	return ret;
 }
@@ -340,12 +341,9 @@ static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
 	struct skt_dev_info *sinfo = platform_get_drvdata(dev);
 	int i;
 
-	platform_set_drvdata(dev, NULL);
-
 	for (i = 0; i < sinfo->nskt; i++)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
 
-	kfree(sinfo);
 	return 0;
 }
 
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:52 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:52 +0000
Subject: [PATCH 5/8] pcmcia: sa1111: update socket driver to use
 devm_clk_get() API
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5tA-0006IC-R9@rmk-PC.arm.linux.org.uk>

Update the pxa2xx socket driver to use the devm_clk_get() API so that
the cleanup paths are simplified.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/sa1111_generic.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 80b8e9d05275..fb902af8a5b7 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -145,7 +145,7 @@ int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops,
 			return -ENOMEM;
 
 		s->soc.nr = ops->first + i;
-		s->soc.clk = clk_get(&dev->dev, NULL);
+		s->soc.clk = devm_clk_get(&dev->dev, NULL);
 		if (IS_ERR(s->soc.clk)) {
 			ret = PTR_ERR(s->soc.clk);
 			kfree(s);
@@ -226,7 +226,6 @@ static int pcmcia_remove(struct sa1111_dev *dev)
 	for (; s; s = next) {
 		next = s->next;
 		soc_pcmcia_remove_one(&s->soc);
-		clk_put(s->soc.clk);
 		kfree(s);
 	}
 
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:23:57 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:23:57 +0000
Subject: [PATCH 6/8] pcmcia: sa1111: simplify clk handing in
 sa1111_pcmcia_add()
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5tF-0006IG-UZ@rmk-PC.arm.linux.org.uk>

clk_get(dev, NULL) will always refer to the same clock, so it's
pointless calling this multiple times for the same device.  As we no
longer have to worry about the cleanup (via use of devm_clk_get()) we
can simplify sa1111_pcmcia_add() too.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/sa1111_generic.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index fb902af8a5b7..a1531feb8460 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -135,8 +135,13 @@ int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops,
 	int (*add)(struct soc_pcmcia_socket *))
 {
 	struct sa1111_pcmcia_socket *s;
+	struct clk *clk;
 	int i, ret = 0;
 
+	clk = devm_clk_get(&dev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
 	ops->socket_state = sa1111_pcmcia_socket_state;
 
 	for (i = 0; i < ops->nr; i++) {
@@ -145,12 +150,8 @@ int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops,
 			return -ENOMEM;
 
 		s->soc.nr = ops->first + i;
-		s->soc.clk = devm_clk_get(&dev->dev, NULL);
-		if (IS_ERR(s->soc.clk)) {
-			ret = PTR_ERR(s->soc.clk);
-			kfree(s);
-			return ret;
-		}
+		s->soc.clk = clk;
+
 		soc_pcmcia_init_one(&s->soc, ops, &dev->dev);
 		s->dev = dev;
 		if (s->soc.nr) {
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:24:03 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:24:03 +0000
Subject: [PATCH 7/8] pcmcia: sa11xx_base.c: remove useless init/exit functions
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5tL-0006IK-2Q@rmk-PC.arm.linux.org.uk>

A library module is not required to have module init/exit functions.
Get rid of these unnecessary functions.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/sa11xx_base.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index 6e6336d47d4a..815b6950975c 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -259,16 +259,6 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 }
 EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe);
 
-static int __init sa11xx_pcmcia_init(void)
-{
-	return 0;
-}
-fs_initcall(sa11xx_pcmcia_init);
-
-static void __exit sa11xx_pcmcia_exit(void) {}
-
-module_exit(sa11xx_pcmcia_exit);
-
 MODULE_AUTHOR("John Dorsey <john+ at cs.cmu.edu>");
 MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11xx core socket driver");
 MODULE_LICENSE("Dual MPL/GPL");
-- 
1.8.3.1



From rmk+kernel at arm.linux.org.uk  Thu Mar 26 04:24:08 2015
From: rmk+kernel at arm.linux.org.uk (Russell King)
Date: Thu, 26 Mar 2015 11:24:08 +0000
Subject: [PATCH 8/8] pcmcia: soc_common: remove skt_dev_info's clk pointer
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <E1Yb5tQ-0006IP-6H@rmk-PC.arm.linux.org.uk>

We no longer need to store the clk pointer in struct skt_dev_info as we
no longer need to remember the clk pointer for the cleanup paths.

Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
---
 drivers/pcmcia/pxa2xx_base.c | 1 -
 drivers/pcmcia/sa11xx_base.c | 1 -
 drivers/pcmcia/soc_common.h  | 1 -
 3 files changed, 3 deletions(-)

diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index dfcf07828605..1b2c58dd43cf 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -308,7 +308,6 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 		return -ENOMEM;
 
 	sinfo->nskt = ops->nr;
-	sinfo->clk = clk;
 
 	/* Initialize processor specific parameters */
 	for (i = 0; i < ops->nr; i++) {
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index 815b6950975c..9f6ec87b9f9e 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -233,7 +233,6 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 		return -ENOMEM;
 
 	sinfo->nskt = nr;
-	sinfo->clk = clk;
 
 	/* Initialize processor specific parameters */
 	for (i = 0; i < nr; i++) {
diff --git a/drivers/pcmcia/soc_common.h b/drivers/pcmcia/soc_common.h
index e6fcbea5b682..94762a54d731 100644
--- a/drivers/pcmcia/soc_common.h
+++ b/drivers/pcmcia/soc_common.h
@@ -68,7 +68,6 @@ struct soc_pcmcia_socket {
 
 struct skt_dev_info {
 	int nskt;
-	struct clk *clk;
 	struct soc_pcmcia_socket skt[0];
 };
 
-- 
1.8.3.1



From linux at arm.linux.org.uk  Thu Mar 26 04:26:04 2015
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Thu, 26 Mar 2015 11:26:04 +0000
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
 <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
Message-ID: <20150326112604.GA8656@n2100.arm.linux.org.uk>

On Thu, Mar 26, 2015 at 07:14:38AM -0400, Nicholas Krause wrote:
> 
> 
> On March 26, 2015 5:52:25 AM EDT, Russell King - ARM Linux <linux at arm.linux.org.uk> wrote:
> >On Wed, Mar 25, 2015 at 11:15:52PM -0400, Nicholas Krause wrote:
> >> This fixes the memory found when running  coccinelle on the latest
> >
> >How does this "fix the memory" ?  Is the memory faulty?
> >
> >> kernel tree for if we are unable to successfully allocate memory
> >> for the structure pointer,sinfo of type skt_dev_info and need to
> >> clean up the memory already allocated to the clk structure pointer,
> >> clk by calling clk_get on it and freeing the no longer required
> >> mermory for this structure pointer.
> >
> >This makes no sense.  clk_get() itself doesn't allocate any memory.  As
> >usual, you act as a mechanical automatom which doesn't understand what
> >you're doing or you just guess.  I don't care which it is, you are a
> >danger to the kernel by doing this.  As many other experienced kernel
> >developers have told you, please stop.
> >
> >In any case, I'm NAKing your patch as there's better ways to solve
> >this.
> >That's where experience and research come in.
> >
> >Nevertheless, thanks for pointing out the oversight, and I notice that
> >there are a few more cases too.
> Very well then I  guess my patch commit message was wrong. 

Again, you fail to understand what you are being told.  Please re-read
the paragraph which starts "In any case, I'm NAKing your patch".

Your patch is one way to solve it, but there are other solutions too.
I've just posted a small patch series which addresses the issue you
have raised.  You need to perform no further action on this.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.


From xerofoify at gmail.com  Thu Mar 26 05:02:50 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Thu, 26 Mar 2015 08:02:50 -0400
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <20150326112604.GA8656@n2100.arm.linux.org.uk>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
 <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
 <20150326112604.GA8656@n2100.arm.linux.org.uk>
Message-ID: <C6A2FE6E-5BFD-4D25-8182-B69A4C4AA99E@gmail.com>



On March 26, 2015 7:26:04 AM EDT, Russell King - ARM Linux <linux at arm.linux.org.uk> wrote:
>On Thu, Mar 26, 2015 at 07:14:38AM -0400, Nicholas Krause wrote:
>> 
>> 
>> On March 26, 2015 5:52:25 AM EDT, Russell King - ARM Linux
><linux at arm.linux.org.uk> wrote:
>> >On Wed, Mar 25, 2015 at 11:15:52PM -0400, Nicholas Krause wrote:
>> >> This fixes the memory found when running  coccinelle on the latest
>> >
>> >How does this "fix the memory" ?  Is the memory faulty?
>> >
>> >> kernel tree for if we are unable to successfully allocate memory
>> >> for the structure pointer,sinfo of type skt_dev_info and need to
>> >> clean up the memory already allocated to the clk structure
>pointer,
>> >> clk by calling clk_get on it and freeing the no longer required
>> >> mermory for this structure pointer.
>> >
>> >This makes no sense.  clk_get() itself doesn't allocate any memory. 
>As
>> >usual, you act as a mechanical automatom which doesn't understand
>what
>> >you're doing or you just guess.  I don't care which it is, you are a
>> >danger to the kernel by doing this.  As many other experienced
>kernel
>> >developers have told you, please stop.
>> >
>> >In any case, I'm NAKing your patch as there's better ways to solve
>> >this.
>> >That's where experience and research come in.
>> >
>> >Nevertheless, thanks for pointing out the oversight, and I notice
>that
>> >there are a few more cases too.
>> Very well then I  guess my patch commit message was wrong. 
>
>Again, you fail to understand what you are being told.  Please re-read
>the paragraph which starts "In any case, I'm NAKing your patch".
>
>Your patch is one way to solve it, but there are other solutions too.
>I've just posted a small patch series which addresses the issue you
>have raised.  You need to perform no further action on this.
That's fine, however I would like to see your solution for my own learning.  Furthermore I did look into it further and clk put is a wrapper function that calls __clk_up which does kfree our structure pointer and releases other resources allocated to  it, namely deleting it from the hlist and removing one  from it's ref count with a call to __clk_release. 
Nick

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.


From xerofoify at gmail.com  Thu Mar 26 08:08:57 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Thu, 26 Mar 2015 11:08:57 -0400
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <20150326112604.GA8656@n2100.arm.linux.org.uk>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
 <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
 <20150326112604.GA8656@n2100.arm.linux.org.uk>
Message-ID: <03F500AB-90A8-465E-9965-2872274CE758@gmail.com>



On March 26, 2015 7:26:04 AM EDT, Russell King - ARM Linux <linux at arm.linux.org.uk> wrote:
>On Thu, Mar 26, 2015 at 07:14:38AM -0400, Nicholas Krause wrote:
>> 
>> 
>> On March 26, 2015 5:52:25 AM EDT, Russell King - ARM Linux
><linux at arm.linux.org.uk> wrote:
>> >On Wed, Mar 25, 2015 at 11:15:52PM -0400, Nicholas Krause wrote:
>> >> This fixes the memory found when running  coccinelle on the latest
>> >
>> >How does this "fix the memory" ?  Is the memory faulty?
>> >
>> >> kernel tree for if we are unable to successfully allocate memory
>> >> for the structure pointer,sinfo of type skt_dev_info and need to
>> >> clean up the memory already allocated to the clk structure
>pointer,
>> >> clk by calling clk_get on it and freeing the no longer required
>> >> mermory for this structure pointer.
>> >
>> >This makes no sense.  clk_get() itself doesn't allocate any memory. 
>As
>> >usual, you act as a mechanical automatom which doesn't understand
>what
>> >you're doing or you just guess.  I don't care which it is, you are a
>> >danger to the kernel by doing this.  As many other experienced
>kernel
>> >developers have told you, please stop.
>> >
>> >In any case, I'm NAKing your patch as there's better ways to solve
>> >this.
>> >That's where experience and research come in.
>> >
>> >Nevertheless, thanks for pointing out the oversight, and I notice
>that
>> >there are a few more cases too.
>> Very well then I  guess my patch commit message was wrong. 
>
>Again, you fail to understand what you are being told.  Please re-read
>the paragraph which starts "In any case, I'm NAKing your patch".
>
>Your patch is one way to solve it, but there are other solutions too.
>I've just posted a small patch series which addresses the issue you
>have raised.  You need to perform no further action on this.
I looked through the clk Api and this seems the simplest way to do it.  Can you send me your solution as I  am curious how yours is better than  mine.  Furthermore I  have finally come to the conclusion that my research efforts need to improve and will look into improving them. Also it would be great if you can put reported by me on the patches in your series fixing this issue.
Thanks, 
Nick 
-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.


From xerofoify at gmail.com  Thu Mar 26 08:45:38 2015
From: xerofoify at gmail.com (Nicholas Krause)
Date: Thu, 26 Mar 2015 11:45:38 -0400
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <551428DE.1060102@lwfinger.net>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
 <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
 <20150326112604.GA8656@n2100.arm.linux.org.uk>
 <03F500AB-90A8-465E-9965-2872274CE758@gmail.com>
 <551428DE.1060102@lwfinger.net>
Message-ID: <8FDDE9DF-D10E-4D1B-9621-E861D5B62792@gmail.com>



On March 26, 2015 11:42:22 AM EDT, Larry Finger <Larry.Finger at lwfinger.net> wrote:
>On 03/26/2015 10:08 AM, Nicholas Krause wrote:
>
>
>> I looked through the clk Api and this seems the simplest way to do
>it.  Can you send me your solution as I  am curious how yours is better
>than  mine.  Furthermore I  have finally come to the conclusion that my
>research efforts need to improve and will look into improving them.
>Also it would be great if you can put reported by me on the patches in
>your series fixing this issue.
>
>http://marc.info/?l=linux-pcmcia&m=142736903012616&w=2 and following
>patches.
>
>Read and learn,
>
>Larry
Thanks Larry, 
This is very helpful. 
Nick 

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.


From Larry.Finger at lwfinger.net  Thu Mar 26 08:42:22 2015
From: Larry.Finger at lwfinger.net (Larry Finger)
Date: Thu, 26 Mar 2015 10:42:22 -0500
Subject: [PATCHv2] pcmcia:Fix memory leak in the function,
 sa11xx_drv_pcmcia_probe
In-Reply-To: <03F500AB-90A8-465E-9965-2872274CE758@gmail.com>
References: <1427339752-25800-1-git-send-email-xerofoify@gmail.com>
 <20150326095225.GY8656@n2100.arm.linux.org.uk>
 <B1082D73-6857-468E-8A59-9ADD8D005DC2@gmail.com>
 <20150326112604.GA8656@n2100.arm.linux.org.uk>
 <03F500AB-90A8-465E-9965-2872274CE758@gmail.com>
Message-ID: <551428DE.1060102@lwfinger.net>

On 03/26/2015 10:08 AM, Nicholas Krause wrote:


> I looked through the clk Api and this seems the simplest way to do it.  Can you send me your solution as I  am curious how yours is better than  mine.  Furthermore I  have finally come to the conclusion that my research efforts need to improve and will look into improving them. Also it would be great if you can put reported by me on the patches in your series fixing this issue.

http://marc.info/?l=linux-pcmcia&m=142736903012616&w=2 and following patches.

Read and learn,

Larry





From robert.jarzmik at free.fr  Thu Mar 26 13:38:07 2015
From: robert.jarzmik at free.fr (Robert Jarzmik)
Date: Thu, 26 Mar 2015 21:38:07 +0100
Subject: [PATCH 0/8] sa11x0 PCMCIA updates
In-Reply-To: <20150326112254.GZ8656@n2100.arm.linux.org.uk> (Russell King's
 message of "Thu, 26 Mar 2015 11:22:54 +0000")
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
Message-ID: <878uejxzo0.fsf@free.fr>

Russell King - ARM Linux <linux at arm.linux.org.uk> writes:

> I will be testing the sa11x0 changes later today, but as I gave most
> of my PXA2xx platforms to Robert, I need Robert to test this on the
> Lubbock.
I will be done this weekend Russell.

Cheers.

-- 
Robert


From robert.jarzmik at free.fr  Sat Mar 28 14:38:24 2015
From: robert.jarzmik at free.fr (Robert Jarzmik)
Date: Sat, 28 Mar 2015 22:38:24 +0100
Subject: [PATCH 4/8] pcmcia: pxa2xx: convert memory allocation to devm_*
 API
In-Reply-To: <E1Yb5t5-0006I8-Oi@rmk-PC.arm.linux.org.uk> (Russell King's
 message of "Thu, 26 Mar 2015 11:23:47 +0000")
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
 <E1Yb5t5-0006I8-Oi@rmk-PC.arm.linux.org.uk>
Message-ID: <87zj6wvm3z.fsf@free.fr>

Russell King <rmk+kernel at arm.linux.org.uk> writes:

> Convert the pxa2xx socket driver memory allocation to use devm_kzalloc()
> to simplify the cleanup path.
>
> Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
> ---
>  drivers/pcmcia/pxa2xx_base.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
> index 197c77a64ce0..dfcf07828605 100644
> --- a/drivers/pcmcia/pxa2xx_base.c
> +++ b/drivers/pcmcia/pxa2xx_base.c
> @@ -302,7 +302,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
>  
>  	pxa2xx_drv_pcmcia_ops(ops);
>  
> -	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
> +	sinfo = devm_kzalloc(&pdev->dev, SKT_DEV_INFO_SIZE(ops->nr),
There is a typo here : &pdev->dev should be &dev->dev.

Now given that fix, you can add my :
Tested-by: Robert Jarzmik <robert.jarzmik at free.fr>

This test of mine is rather cheap :
 - it relies on 4.0-rc4
 - I don't have any PCMCIA card to insert in the lubbock, hence the "cheap"
 - I judge that pcmcia is working because :
   - cat /proc/iomem gives:
     10000000-10001fff : sa1111
       10000400-100005ff : 0400
       10000800-100009ff : 0800
       10000a00-10000bff : 0a00
         10000a00-10000bff : sa1111-ps2
       10000c00-10000dff : 0c00
         10000c00-10000dff : sa1111-ps2
       10001600-100017ff : irq
       10001800-100019ff : 1800
         10001800-100019ff : sa1111-pcmcia
    - I don't see any error message in kernel log

As a side note mainly to myself, the pcmcia is broken on pxa2xx architectures
and panics the kernel at boot time because :
 - in drivers/pcmcia/sa1111_lubbock.c I see :
   pcmcia_lubbock_init()
     pxa2xx_configure_sockets(&sadev->dev);
       here it is expected that platform_data contains the pcmcia ops, but it's
       NULL, and the dereferencing in pxa2xx_configure_sockets() of ops->first
       panics.

Cheers.

-- 
Robert


From linux at arm.linux.org.uk  Sat Mar 28 15:06:23 2015
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Sat, 28 Mar 2015 22:06:23 +0000
Subject: [PATCH 4/8] pcmcia: pxa2xx: convert memory allocation to devm_*
 API
In-Reply-To: <87zj6wvm3z.fsf@free.fr>
References: <20150326112254.GZ8656@n2100.arm.linux.org.uk>
 <E1Yb5t5-0006I8-Oi@rmk-PC.arm.linux.org.uk>
 <87zj6wvm3z.fsf@free.fr>
Message-ID: <20150328220623.GA24899@n2100.arm.linux.org.uk>

On Sat, Mar 28, 2015 at 10:38:24PM +0100, Robert Jarzmik wrote:
> Russell King <rmk+kernel at arm.linux.org.uk> writes:
> 
> > Convert the pxa2xx socket driver memory allocation to use devm_kzalloc()
> > to simplify the cleanup path.
> >
> > Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
> > ---
> >  drivers/pcmcia/pxa2xx_base.c | 8 +++-----
> >  1 file changed, 3 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
> > index 197c77a64ce0..dfcf07828605 100644
> > --- a/drivers/pcmcia/pxa2xx_base.c
> > +++ b/drivers/pcmcia/pxa2xx_base.c
> > @@ -302,7 +302,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
> >  
> >  	pxa2xx_drv_pcmcia_ops(ops);
> >  
> > -	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
> > +	sinfo = devm_kzalloc(&pdev->dev, SKT_DEV_INFO_SIZE(ops->nr),
> There is a typo here : &pdev->dev should be &dev->dev.
> 
> Now given that fix, you can add my :
> Tested-by: Robert Jarzmik <robert.jarzmik at free.fr>
> 
> This test of mine is rather cheap :
>  - it relies on 4.0-rc4
>  - I don't have any PCMCIA card to insert in the lubbock, hence the "cheap"
>  - I judge that pcmcia is working because :
>    - cat /proc/iomem gives:
>      10000000-10001fff : sa1111
>        10000400-100005ff : 0400
>        10000800-100009ff : 0800
>        10000a00-10000bff : 0a00
>          10000a00-10000bff : sa1111-ps2
>        10000c00-10000dff : 0c00
>          10000c00-10000dff : sa1111-ps2
>        10001600-100017ff : irq
>        10001800-100019ff : 1800
>          10001800-100019ff : sa1111-pcmcia
>     - I don't see any error message in kernel log
> 
> As a side note mainly to myself, the pcmcia is broken on pxa2xx architectures
> and panics the kernel at boot time because :
>  - in drivers/pcmcia/sa1111_lubbock.c I see :
>    pcmcia_lubbock_init()
>      pxa2xx_configure_sockets(&sadev->dev);
>        here it is expected that platform_data contains the pcmcia ops, but it's
>        NULL, and the dereferencing in pxa2xx_configure_sockets() of ops->first
>        panics.

I guess it's broken as a result of 5b703683b6cc3cb97bbe6b1b14898b273eb59279
which added that call without really understanding the call path.  I
don't see any solution other than partially reverting that commit.
As can be seen from the commit message, this was done blindly with no
testing - so it's no surprise that it broke.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.


From dbaryshkov at gmail.com  Mon Mar 30 04:33:45 2015
From: dbaryshkov at gmail.com (Dmitry Eremin-Solenikov)
Date: Mon, 30 Mar 2015 14:33:45 +0300
Subject: [PATCH] pcmcia: fix a boot time warning in pcmcia cs code
Message-ID: <1427715225-27701-1-git-send-email-dbaryshkov@gmail.com>

During bootup pcmcia (pccardd) code enforces the following warning
backtrace:

do not call blocking ops when !TASK_RUNNING; state=1 set at [<c0319e74>] pccardd+0xb8/0x3fc
Modules linked in:
CPU: 0 PID: 14 Comm: pccardd Not tainted 4.0.0-rc6+ #11
Hardware name: Sharp-Collie
[<c0105cd8>] (unwind_backtrace) from [<c0103ef8>] (show_stack+0x10/0x14)
[<c0103ef8>] (show_stack) from [<c010e9b8>] (warn_slowpath_common+0x74/0xac)
[<c010e9b8>] (warn_slowpath_common) from [<c010ea20>] (warn_slowpath_fmt+0x30/0x40)
[<c010ea20>] (warn_slowpath_fmt) from [<c012b1b4>] (__might_sleep+0x84/0xa0)
[<c012b1b4>] (__might_sleep) from [<c040fbb0>] (mutex_lock_nested+0x24/0x388)
[<c040fbb0>] (mutex_lock_nested) from [<c0319eb4>] (pccardd+0xf8/0x3fc)
[<c0319eb4>] (pccardd) from [<c0127370>] (kthread+0xdc/0xfc)
[<c0127370>] (kthread) from [<c01013a8>] (ret_from_fork+0x14/0x2c)
---[ end trace fd94911637eed4ba ]---

This happens due to kthread trying to lock mutex in a TASK_INTERRUPTIBLE
state. Limit TASK_INTERRUPTIBLE task state to the schedule() call only,
so that the rest of the code runs in TASK_RUNNING state.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov at gmail.com>
---
 drivers/pcmcia/cs.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c
index 5292db6..367d45e 100644
--- a/drivers/pcmcia/cs.c
+++ b/drivers/pcmcia/cs.c
@@ -626,8 +626,6 @@ static int pccardd(void *__skt)
 		unsigned int events;
 		unsigned int sysfs_events;
 
-		set_current_state(TASK_INTERRUPTIBLE);
-
 		spin_lock_irqsave(&skt->thread_lock, flags);
 		events = skt->thread_events;
 		skt->thread_events = 0;
@@ -675,11 +673,15 @@ static int pccardd(void *__skt)
 		if (kthread_should_stop())
 			break;
 
+		set_current_state(TASK_INTERRUPTIBLE);
+
 		schedule();
+
+		/* make sure we are running */
+		__set_current_state(TASK_RUNNING);
+
 		try_to_freeze();
 	}
-	/* make sure we are running before we exit */
-	set_current_state(TASK_RUNNING);
 
 	/* shut down socket, if a device is still present */
 	if (skt->state & SOCKET_PRESENT) {
-- 
2.1.4



