Averatec 6240 pcmcia_socket0: unable to apply power

[James]

I just wanted to say thank you to all to helped me get
my wireless card working.  It is up and running now.
Thanks to the memory reserve because i now have power.
Thanks all

james

--- Daniel Ritz <daniel.ritz at gmx.ch> wrote:

> On Thursday 08 September 2005 19.33, David Hinds
> wrote:
> > On Thu, Sep 08, 2005 at 06:30:23PM +0200, Daniel
> Ritz wrote:
> > > hi james
> > > 
> > > [ please always use reply-to-all. i'm not
> subscribed to the list ]
> > > 
> > > you have a notebook with graphic controller
> working in shared memory mode
> > > which means it uses the main memory.
> unfortunatley the is BIOS crap and
> > > forgets to report that. add the following to the
> kernel command line to
> > > fix the problem:
> > > 	reserve=0x1e000000,0x2000000
> > > it tells the kernel not to use the region from
> 480-512 MB.
> > 
> > I thought that this had been fixed, so the kernel
> would round up
> > apparent memory sizes that were a bit smaller than
> a power of two.
> 
> it currently only rounds up to the next MB. but that
> doesn't catch
> the shared VGAs...
> 
> > I guess not.  It really should get fixed properly
> (even though it
> > technically is not a kernel problem), because it
> generates a huge
> > amount of problem reports.
> > 
> 
> something like the attached patch...
> 
> cc:ing linus as he is the one that added the "find
> the largest gap" code
> that comes handy here...
> and cc:ing andrew for the obvious reason...
> 
> rgds
> -daniel
> 
> ----
> 
> [PATCH] i386/x86_64: align pci iomem start address
> to 64MB
> 
> align the PCI iomemory starting address to a muliple
> of 64MB to avoid problems
> with some BIOS that forget to report the memory used
> by a shared memory graphic
> controller in the e820 memory map.
> 
> most people don't give the shared VGA more than
> 64MB, right?
> 
> Signed-off-by: Daniel Ritz <daniel.ritz at gmx.ch>
> 
> diff --git a/arch/i386/kernel/setup.c
> b/arch/i386/kernel/setup.c
> --- a/arch/i386/kernel/setup.c
> +++ b/arch/i386/kernel/setup.c
> @@ -1325,7 +1325,16 @@ static void __init
> register_memory(void)
>  	i = e820.nr_map;
>  	while (--i >= 0) {
>  		unsigned long long start = e820.map[i].addr;
> -		unsigned long long end = start +
> e820.map[i].size;
> +		unsigned long long end;
> +
> +		/*
> +		 * try to find the largest gap starting at a
> muliple of 64MB.
> +		 * this is to avoid problems with some BIOSen
> that forget to report
> +		 * memory used by the shared memory graphic
> controller.
> +		 * most people are not going to use more than
> 64MB for a shared
> +		 * controller, right? round up to 128MB?
> +		 */
> +		end = (start + e820.map[i].size + 0x3ffffff) &
> ~0x3ffffff;
>  
>  		/*
>  		 * Since "last" is at most 4GB, we know we'll
> @@ -1344,14 +1353,10 @@ static void __init
> register_memory(void)
>  	}
>  
>  	/*
> -	 * Start allocating dynamic PCI memory a bit into
> the gap,
> -	 * aligned up to the nearest megabyte.
> -	 *
> -	 * Question: should we try to pad it up a bit (do
> something
> -	 * like " + (gapsize >> 3)" in there too?). We now
> have the
> -	 * technology.
> +	 * Start allocating dynamic PCI memory at gapstart
> which is already
> +	 * rounded up to a multiple of 6 MB.
>  	 */
> -	pci_mem_start = (gapstart + 0xfffff) & ~0xfffff;
> +	pci_mem_start = gapstart;
>  
>  	printk("Allocating PCI resources starting at %08lx
> (gap: %08lx:%08lx)\n",
>  		pci_mem_start, gapstart, gapsize);
> diff --git a/arch/x86_64/kernel/e820.c
> b/arch/x86_64/kernel/e820.c
> --- a/arch/x86_64/kernel/e820.c
> +++ b/arch/x86_64/kernel/e820.c
> @@ -578,7 +578,16 @@ __init void
> e820_setup_gap(void)
>  	i = e820.nr_map;
>  	while (--i >= 0) {
>  		unsigned long long start = e820.map[i].addr;
> -		unsigned long long end = start +
> e820.map[i].size;
> +		unsigned long long end;
> +
> +		/*
> +		 * try to find the largest gap starting at a
> muliple of 64MB.
> +		 * this is to avoid problems with some BIOSen
> that forget to report
> +		 * memory used by the shared memory graphic
> controller.
> +		 * most people are not going to use more than
> 64MB for a shared
> +		 * controller, right? round up to 128MB?
> +		 */
> +		end = (start + e820.map[i].size + 0x3ffffff) &
> ~0x3ffffff;
>  
>  		/*
>  		 * Since "last" is at most 4GB, we know we'll
> @@ -604,14 +613,10 @@ __init void
> e820_setup_gap(void)
>  	}
>  
>  	/*
> -	 * Start allocating dynamic PCI memory a bit into
> the gap,
> -	 * aligned up to the nearest megabyte.
> -	 *
> -	 * Question: should we try to pad it up a bit (do
> something
> -	 * like " + (gapsize >> 3)" in there too?). We now
> have the
> -	 * technology.
> +	 * Start allocating dynamic PCI memory at gapstart
> which is already
> +	 * rounded up to a multiple of 6 MB.
>  	 */
> -	pci_mem_start = (gapstart + 0xfffff) & ~0xfffff;
> +	pci_mem_start = gapstart;
>  
>  	printk(KERN_INFO "Allocating PCI resources
> starting at %lx (gap: %lx:%lx)\n",
>  		pci_mem_start, gapstart, gapsize);
> 
>  
> 


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