PCI Bus Card Problems

[Russell King]

On Thu, Sep 01, 2005 at 11:15:42AM +0200, Dominik Brodowski wrote:
> On x86, this is the case since 2.6.13, as x86 switched to the generic PCI 
> subsystem setup code, IIRC. Do you know why this doesn't handle the ARM case
> correctly?

No idea - I just keep using the patch because it works for me.  I've
little interest in delving into this code anymore.

> >  	config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
> 
> Might this just miss a pcibus_resource_to_bus() conversion of dev->resource[0].start?

It does look like it.

> >  	config_writew(socket, PCI_COMMAND,
> >  			PCI_COMMAND_IO |
> > @@ -955,6 +959,7 @@
> >  		(dev->subordinate->subordinate << 16) | /* subordinate bus */
> >  		(dev->subordinate->secondary << 8) |  /* secondary bus */
> >  		dev->subordinate->primary);		   /* primary bus */
> > +#endif
> 
> Why the rest of it?

I moved these to the generic PCI layer a while back, and so in theory
these are no longer required.  However, I never tested it on an x86
box so I was never happy to remove them.

> > +	pci_set_master(dev);
> 
> Is this ARM-specific? Should this go in unconditionally?

Probably unconditionally, but as I've said above, it never got tested
on x86.

> Also, to me it seems that the original poster had mostly a problem with the
> IRQ not being allocated properly -- or is this a symptom rather than the
> cause?

Check what's happening - the socket status is 0xffffffff which implies
we can't access the socket registers.  Hence we'll never produce an IRQ
and fail to cause a PCI interrupt.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core