[PATCH] TI IRQ routing - one more time

[Pavel Roskin]

On Mon, 15 Sep 2003, Daniel Ritz wrote:

> > It would be nice if you posted the kernel log here (run "dmesg").
> > Let everybody see that you don't see the message "Uninitialized IRQ
> > routing detected, enabling PCI interrupts".
> >
> > You could also print irqmux by adding
> > printk("irqmux = 0x%08x\n", irqmux);
> > immediately after
> > irqmux = config_readl(socket, TI122X_IRQMUX);
>
> ok, so here's the relevant part of dmesg:

Thank you for taking time!

> Linux Kernel Card Services 3.1.22
>   options:  [pci] [cardbus] [pm]
> PCI: Found IRQ 5 for device 0000:02:07.0
> PCI: Sharing IRQ 5 with 0000:00:1f.1
> Yenta: CardBus bridge found at 0000:02:07.0 [1558:5600]
> Yenta: Using CSCINT to route CSC interrupts to PCI
> Yenta: Routing CardBus interrupts to PCI
> irqmux = 0x01001002
> Yenta: ISA IRQ list 0498, PCI irq5
> Socket status: 30000006

0498 is actually in hex, it means that IRQ 3, 4, 7 and 10 are working.

irqmux:
MFUNC6 = CLKRUN
MFUNC5 = GPI4
MFUNC4 = GPI3
MFUNC3 = IRQSER
MFUNC2 = GPI2
MFUNC1 = GPI1
MFUNC0 = INTA

Not a single MFUNC terminal is in the reserved (i.e. undefined) state!
With irqmux being 0, we would have MFUNC3 and MFUNC6 in the undefined
state.  IRQSER and INTA must go to a multiplexer to be converted to ISA
interrupts.  You must be using serialized ISA interrupts.

> eth1: Xircom: port 0x300, irq 10, hwaddr 00:80:C7:A1:64:72

Excellent.  IRQ 10 is working, but it's not a PCI interrupt, and it's not
connected to any MFUNC pin.

All this means that my understanding is correct and that reprogramming the
board if irqmux is 0 is safe because it does not affect systems using
ISA interrupts.

-- 
Regards,
Pavel Roskin