[PATCH v6 01/18] nvmet: Rapid Path Failure Recovery set controller identify fields

[Mohamed Khalfella]

On Thu 2026-10-15 14:58:04 +0200, Daniel Wagner wrote:
> >   maximum number of in-progress controller reset operations. CCRL is
> >   hardcoded to 4 as recommended by TP8028.
> 
> The spec says at least 4. 

- CCRL (Cross-Controller Reset Limit): is an 8bit value that defines the
  maximum number of in-progress controller reset operations. CCRL is
  hardcoded to 4 because TP8028 recommended a value no less than 4.

Right, I updated the commit message to mention that recommendation.

> 
> > @@ -1695,6 +1699,11 @@ struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args)
> >  	}
> >  	ctrl->cntlid = ret;
> >  
> > +	if (!nvmet_is_disc_subsys(ctrl->subsys)) {
> > +		ctrl->ciu = get_random_u8() ? : 1;
> > +		ctrl->cirn = get_random_u64();
> 
> While get_random_u64 is very unlikely to return 0, it still possible, thus
> 
>    get_random_u64() ? : 1;

Good point. Updated.

> 
> would be the safe choice. Besides this nitpicking:
> 
> Reviewed-by: Daniel Wagner <dwagner at suse.de>
> 
> -- 
> Daniel Wagner <wagi at kernel.org>