回复：回复：[PATCH 1/3] nvme: Add adaptive PCIe link rate switching function

[廖煊]

Hi Bjorn,

To improve generality and make the assumption explicit, I will follow
your suggestion: I will encapsulate the threshold calculation flow in
a separate function, and add a comment there stating that this parameter
is platform-dependent and that the current value is for Hygon platforms.
I will send an updated patch with this change.

Thanks,
Liao Xuan
------------------------------------------------------------------
发件人：Bjorn Helgaas <helgaas at kernel.org>
发送时间：2026年11月6日(周五) 03:22
收件人："廖煊"<liaoxuan at open-hieco.net>
抄　送：kbusch<kbusch at kernel.org>; axboe<axboe at kernel.dk>; hch<hch at lst.de>; sagi<sagi at grimberg.me>; "linux-nvme"<linux-nvme at lists.infradead.org>; "linux-kernel"<linux-kernel at vger.kernel.org>; default avatarZheng Tan<tanzheng at kylinos.cn>; "Ilpo Järvinen"<ilpo.jarvinen at linux.intel.com>
主　题：Re: 回复：[PATCH 1/3] nvme: Add adaptive PCIe link rate switching function


On Thu, Nov 05, 2026 at 02:30:13PM +0800, 廖煊 wrote:
> Hi Bjorn,
> Thank you for the review and for the question.
> 
> The reason for restricting this feature to Hygon platforms is that the
> PCIe link retraining time varies across different CPU platforms.
> 
> In this patch, the I/O threshold for downgrading/upgrading the link rate
> is derived based on this retraining time. Currently, it is hardcoded as
> 100us in nvme_calc_speed_threshold(), which is the validated value for
> Hygon. Since we have only verified this timing parameter on Hygon platforms,
> we added the restriction to avoid potential performance regressions on
> other platforms where the retraining time might be different.

Seems suspect to hard-code platform parameters like this, but if you
must, at least add a comment to the effect that this depends on the
platform and the current value is for platform X.