[PATCH 7/9] nvme-pci: convert the data mapping blk_rq_dma_map

Christoph Hellwig hch at lst.de
Mon Jun 16 04:33:55 PDT 2025


On Mon, Jun 16, 2025 at 09:41:15AM +0200, Daniel Gomez wrote:
> >> Adding support to
> >> multiple SGL segments should allow us to increase this limit 256 -> 2048.
> >>
> >> Is this correct?
> > 
> > Yes.  Note that plenty of hardware doesn't really like chained SGLs too
> > much and you might get performance degradation.
> >
> 
> I see the driver assumes better performance on SGLs over PRPs when I/Os are
> greater than 32k (this is the default sgl threshold).

Yes.  Although that might be worth revisiting - the threshold was we
benchmarked on the first hardware we got hold off that supports SGLs.

> But what if chaining SGL
> is needed, i.e. my host segments are between 4k and 16k, would PRPs perform
> better than chaining SGLs?

Right now we don't support chaining of SGL descriptors, so that's a moot
point.

> Also, if host segments are between 4k and 16k, PRPs would be able to support it
> but this limit prevents that use case. I guess the question is if you see any
> blocker to enable this path?

Well, if you think it's worth it give it a spin on a wide variety of
hardware.



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