[PATCH] nvme: allow use of cmb on v1.4 controllers

[Klaus Jensen]

On Jan 14 10:06, Keith Busch wrote:
> On Thu, Jan 14, 2021 at 02:24:41PM +0100, Klaus Jensen wrote:
> > @@ -1795,6 +1796,15 @@ static void nvme_map_cmb(struct nvme_dev *dev)
> >  	if (dev->cmb_size)
> >  		return;
> >  
> > +	vs = readl(dev->bar + NVME_REG_VS);
> > +
> > +	if (vs >= NVME_VS(1, 4, 0)) {
> > +		if (!NVME_CAP_CMBS(dev->ctrl.cap))
> > +			return;
> > +
> > +		writel(NVME_CMBMSC_CRE, dev->bar + NVME_REG_CMBMSC);
> > +	}
> > +
> >  	dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
> >  	if (!dev->cmbsz)
> >  		return;
> > @@ -1805,6 +1815,19 @@ static void nvme_map_cmb(struct nvme_dev *dev)
> >  	bar = NVME_CMB_BIR(dev->cmbloc);
> >  	bar_size = pci_resource_len(pdev, bar);
> >  
> > +	if (vs >= NVME_VS(1, 4, 0)) {
> > +		cmbmsc = pci_resource_start(pdev, bar);
> 
> Shouldn't this have a '+ offset' in case the CMB doesn't start at the
> beginning of the bar?
> 


Of course, good catch!

> > +		cmbmsc |= (NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE);
> > +
> > +		/*
> > +		 * Writing the low bits may cause the controller to check the
> > +		 * validity of the 52 bit controller base address in the CMBMSC
> > +		 * register, so write the high bits first.
> > +		 */
> > +		writel(cmbmsc >> 32, dev->bar + NVME_REG_CMBMSC + 4);
> > +		writel(cmbmsc, dev->bar + NVME_REG_CMBMSC);
> 
> hi_lo_writeq()?
> 

Ah, was looking for that...

> This should probably come after we've verified the '(offset > bar_size)'
> check below so that we're not enabling these capabilities before we know
> if they're within the BAR.
> 

Right.

> > +	}
> > +
> >  	if (offset > bar_size)
> >  		return;

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