[PATCH 2/2] nvme-pci: add AMD PCIe quirk for suspend/resume

Liang, Prike Prike.Liang at amd.com
Wed Apr 14 07:10:13 BST 2021


[AMD Public Use]

> From: Greg KH <gregkh at linuxfoundation.org>
> Sent: Wednesday, April 14, 2021 1:34 PM
> To: Liang, Prike <Prike.Liang at amd.com>
> Cc: linux-nvme at lists.infradead.org; kbusch at kernel.org;
> Chaitanya.Kulkarni at wdc.com; hch at infradead.org; stable at vger.kernel.org;
> S-k, Shyam-sundar <Shyam-sundar.S-k at amd.com>; Deucher, Alexander
> <Alexander.Deucher at amd.com>
> Subject: Re: [PATCH 2/2] nvme-pci: add AMD PCIe quirk for suspend/resume
>
> On Wed, Apr 14, 2021 at 10:18:14AM +0800, Prike Liang wrote:
> > The NVME device pluged in some AMD PCIE root port will resume timeout
> > from s2idle which caused by NVME power CFG lost in the SMU FW restore.
> > This issue can be workaround by using PCIe power set with simple
> > suspend/resume process path instead of APST. In the onwards ASIC will
> > try do the NVME shutdown save and restore in the BIOS and still need
> > PCIe power setting to resume from RTD3 for s2idle.
> >
> > Update the nvme_acpi_storage_d3() _with previously added quirk.
> >
> > Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni at wdc.com>
> > [ck: split patches for nvme and pcie]
> > Signed-off-by: Prike Liang <Prike.Liang at amd.com>
> > Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k at amd.com>
> > Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni at wdc.com>
> > Cc: <stable at vger.kernel.org> # 5.11+
> > ---
> >  drivers/nvme/host/pci.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index
> > 6bad4d4..dd46d9e 100644
> > --- a/drivers/nvme/host/pci.c
> > +++ b/drivers/nvme/host/pci.c
> > @@ -2832,6 +2832,7 @@ static bool nvme_acpi_storage_d3(struct pci_dev
> > *dev)  {
> >  struct acpi_device *adev;
> >  struct pci_dev *root;
> > +struct pci_dev *rdev;
> >  acpi_handle handle;
> >  acpi_status status;
> >  u8 val;
> > @@ -2845,6 +2846,10 @@ static bool nvme_acpi_storage_d3(struct
> pci_dev *dev)
> >  if (!root)
> >  return false;
> >
> > +rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
> > +if (rdev->dev_flags &
> PCI_DEV_FLAGS_AMD_NVME_SIMPLE_SUSPEND)
> > +return NVME_QUIRK_SIMPLE_SUSPEND;
> > +
>
> You just leaked a reference count :(
>
> And what if rdev is NULL?
That seems the root complex entity not likely inexistence but have a null point check will be more safe.
Thanks point out and will update the patch.

Thanks,
Prike



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