[PATCH v2] nvme: put some AMD PCIE downstream NVME device to simple suspend/resume path

Chaitanya Kulkarni Chaitanya.Kulkarni at wdc.com
Thu Apr 1 03:05:18 BST 2021


On 3/31/21 18:51, Keith Busch wrote:
> On Thu, Apr 01, 2021 at 01:04:43AM +0000, Liang, Prike wrote:
>> [AMD Official Use Only - Internal Distribution Only]
> This header is not appropriate for public list communication.

Yes please remove this from next patches.

>>>> +static const struct pci_device_id pcie_ids[] = {
>>>> +{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_RN) },
>>>> +{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_CZN) },
>>>> +{ }
>>>> +};
>>>> +
>>> why new global pci_device_id array is needed ?
>>>
>> [Prike] This pci_device_id  array contains the platform root complex DID which need shutdown the NVME in this armed platform for s2idle.
> I think Chaitanya is just suggesting you move this declaration to the
> scope that uses it. 
>

Yes, something like this on the top of your patch totally untested :-

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index fa81cea41f48..8b2f619eabab 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -42,9 +42,6 @@
 #define NVME_MAX_KB_SZ 4096
 #define NVME_MAX_SEGS  127
 
-#define AMD_PCIE_ID_CZN 0x1630
-#define AMD_PCIE_ID_RN AMD_PCIE_ID_CZN
-
 static int use_threaded_interrupts;
 module_param(use_threaded_interrupts, int, 0);
 
@@ -73,12 +70,6 @@ static unsigned int io_queue_depth = 1024;
 module_param_cb(io_queue_depth, &io_queue_depth_ops, &io_queue_depth,
0644);
 MODULE_PARM_DESC(io_queue_depth, "set io queue depth, should >= 2");
 
-static const struct pci_device_id pcie_ids[] = {
-       { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_RN) },
-       { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_CZN) },
-       { }
-};
-
 static int io_queue_count_set(const char *val, const struct
kernel_param *kp)
 {
        unsigned int n;
@@ -2835,6 +2826,10 @@ static unsigned long
check_vendor_combination_bug(struct pci_dev *pdev)
 }
 
 #ifdef CONFIG_ACPI
+
+#define AMD_PCIE_ID_CZN 0x1630
+#define AMD_PCIE_ID_RN AMD_PCIE_ID_CZN
+
 static bool nvme_acpi_storage_d3(struct pci_dev *dev)
 {
        struct acpi_device *adev;
@@ -2843,6 +2838,12 @@ static bool nvme_acpi_storage_d3(struct pci_dev *dev)
        acpi_handle handle;
        acpi_status status;
        u8 val;
+       const struct pci_device_id pcie_ids[] = {
+               { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_RN) },
+               { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_CZN) },
+               { }
+       };
+
 
        /*
         * Look for _DSD property specifying that the storage device on
the port




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