[PATCH V3] nvme-pci: add sgl support

Keith Busch keith.busch at intel.com
Thu Aug 10 09:47:23 PDT 2017


On Thu, Aug 10, 2017 at 01:59:05AM -0700, Christoph Hellwig wrote:
> On Tue, Aug 01, 2017 at 04:48:04AM -0400, Keith Busch wrote:
> > On Tue, Aug 01, 2017 at 08:29:00AM +0000, Chaitanya Kulkarni wrote:
> > > [CK] Yes, I've observed approximately %5 better
> > > performance for IO sizes larger than 32k (for sgl_threshold = 32k).
> > 
> > Is that a physically contiguous 32k, or does each 4k require a different
> > SG element? Could you try to force both conditions and see how each
> > scenario compares with PRP?
> 
> How do we find out the segment alignment without walking the list of
> biovecs, which would be rather annoying.

The biovecs already gets walked and iod->nents will tell you how many
physical segments there are.



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