Problems writing to intel P3700 NVMe drive
keith.busch at intel.com
Thu May 28 14:31:00 PDT 2015
Using 'pcie_bus_perf' will work just fine in most cases, selecting the
highest capable settings so as not to penalize other h/w. Though all
your controllers had the same max payload capabilities anyway, so they
should all be the same from the max TLP perspective.
On Thu, 28 May 2015, Pavilion Storage wrote:
> The root cause might be a bug in the kernel where pcie devices are
> configured. Setting it to 128B will work, but may not perform to the
> best capabilities allowed by the device and RC. If we have multiple
> drives from different manufacturers in the system, we may penalize the
> drive that has the hardware capability to handle higher MPSS.
> On Thu, May 28, 2015 at 2:03 PM, Keith Busch <keith.busch at intel.com> wrote:
>> Perhaps not a desirable/permanent solution, but for everyone's benefit,
>> we can work-around the problem with kernel parameter:
>> Using 'pcie_bus_perf' instead may also work, though your original
>> solution of just using x86 sounded perfectly reasonable to me. :)
>> On Thu, 28 May 2015, Pavilion Storage wrote:
>>> Thanks to Keith Busch for the providing the clues.
>>> The problem was that the PCIe MPSS on the drive and the CPU root
>>> complex did not match and that caused a problem. Setting it to a
>>> common value fixed the problem.
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