/*
 *  drivers/mtd/nand/sharp_sl.c
 *
 *  Copyright (C) 2004 John Lenz <jelenz@students.wisc.edu>
 * 
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>

/*
 * MTD structure for SHARP SL board
 */
static struct mtd_info *sharp_sl_mtd = NULL;

/*
 * Module stuff
 */

static int sharp_sl_io_base = 0;
static int sharp_sl_phys_base = 0;

module_param_named(phys_base, sharp_sl_phys_base, int, 0);

/* registers */
#define CPLD_REG(ofst)	(*(volatile unsigned char*)(sharp_sl_io_base+(ofst)))
#define ECCLPLB		0x00	/* line parity 7 - 0 bit */
#define ECCLPUB		0x04	/* line parity 15 - 8 bit */
#define ECCCP		0x08	/* column parity 5 - 0 bit */
#define ECCCNTR		0x0C	/* ECC byte counter */
#define ECCCLRR		0x10	/* cleare ECC */
#define FLASHIO		0x14	/* Flash I/O */
#define FLASHCTL	0x18	/* Flash Control */

/* Flash control bit */
#define FLRYBY		(1 << 5)
#define FLCE1		(1 << 4)
#define FLWP		(1 << 3)
#define FLALE		(1 << 2)
#define FLCLE		(1 << 1)
#define FLCE0		(1 << 0)

/*
 * Define partitions for flash device
 */
const static struct mtd_partition partition_info[] = {
	{
		.name = "NAND flash partition 0",
		.offset = 0,
		.size = 7 * 1024 * 1024,
	},
	{
		.name = "NAND flash partition 1",
		.offset = 7 * 1024 * 1024,
		.size = 30 * 1024 * 1024,
	},
	{
		.name = "NAND flash partition 2",
		.offset = 37 * 1024 * 1024,
		.size = (64 - 37) * 1024 * 1024,
	},
};

/* 
 *	hardware specific access to control-lines
*/
static void sharp_sl_hwcontrol(struct mtd_info *mtd, int cmd){
    switch (cmd) {
	case NAND_CTL_SETCLE: CPLD_REG(FLASHCTL) |= FLCLE; break;
	case NAND_CTL_CLRCLE: CPLD_REG(FLASHCTL) &= ~FLCLE; break;

	case NAND_CTL_SETALE: CPLD_REG(FLASHCTL) |= FLALE; break;
	case NAND_CTL_CLRALE: CPLD_REG(FLASHCTL) &= ~FLALE; break;

	case NAND_CTL_SETNCE: CPLD_REG(FLASHCTL) &= ~(FLCE0|FLCE1); break;
	case NAND_CTL_CLRNCE: CPLD_REG(FLASHCTL) |= (FLCE0|FLCE1); break;
    }
}


static void sharp_sl_nand_enable_hwecc(struct mtd_info *mtd, int cmd)
{
    CPLD_REG(ECCCLRR) = 0;
}


static int sharp_sl_nand_calculate_ecc(struct mtd_info *mtd, const u_char* dat, u_char* ecc_code)
{
    ecc_code[0] = ~CPLD_REG(ECCLPUB);
    ecc_code[1] = ~CPLD_REG(ECCLPLB);
    ecc_code[2] = (~CPLD_REG(ECCCP) << 2) | 0x03;
    return CPLD_REG(ECCCNTR) != 0;
}

int __init sharp_sl_init (void)
{
	struct nand_chip *this;
	int err = 0;

	/* Allocate memory for MTD device structure and private data */
	sharp_sl_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL);
	if (!sharp_sl_mtd) {
		printk ("Unable to allocate SHARP SL NAND MTD device structure.\n");
		err = -ENOMEM;
		goto out;
	}

	/* Initialize structures */
	memset ((char *) sharp_sl_mtd, 0, sizeof(struct mtd_info) + sizeof(struct nand_chip));

	/* map physical adress */
	sharp_sl_io_base = (unsigned long)ioremap(sharp_sl_phys_base, 0x1000);
	if(!sharp_sl_io_base){
		printk("Ioremap to access SHARP SL NAND chip failed\n");
		err = -EIO;
		goto out_mtd;
	}

	/* Get pointer to private data */
	this = (struct nand_chip *) (&sharp_sl_mtd[1]);
	/* Link the private data with the MTD structure */
	sharp_sl_mtd->priv = this;

	/* PXA Initialize */
	CPLD_REG(FLASHCTL) |= FLWP;

	/* Set address of NAND IO lines */
	this->IO_ADDR_R = sharp_sl_io_base + FLASHIO;
	this->IO_ADDR_W = sharp_sl_io_base + FLASHIO;
	/* Reference hardware control function */
	this->hwcontrol = sharp_sl_hwcontrol;
	/* Set command delay time, see datasheet for correct value */
	this->chip_delay = 15;
	/* Assign the device ready function, if available */
	//this->dev_ready = board_dev_ready;
	this->eccmode = NAND_ECC_HW3_256;
	this->enable_hwecc = sharp_sl_nand_enable_hwecc;
	this->calculate_ecc = sharp_sl_nand_calculate_ecc;
	this->correct_data = nand_correct_data;

	/* Scan to find existance of the device */
	if (nand_scan (sharp_sl_mtd, 1)) {
		err = -ENXIO;
		goto out_ior;
	}

	add_mtd_partitions(sharp_sl_mtd, partition_info, ARRAY_SIZE(partition_info));
	goto out;

out_ior:
	iounmap((void *)sharp_sl_io_base);
out_mtd:
	kfree (sharp_sl_mtd);
out:
	return err;
}
//module_init(sharp_sl_init);
late_initcall(sharp_sl_init);

#ifdef MODULE
static void __exit sharp_sl_cleanup (void)
{
	/* Release resources, unregister device */
	nand_release (sharp_sl_mtd);

	/* unmap physical adress */
	iounmap((void *)sharp_sl_io_base);
	
	/* Free the MTD device structure */
	kfree (sharp_sl_mtd);
}
module_exit(sharp_sl_cleanup);
#endif

MODULE_LICENSE("GPL");
MODULE_AUTHOR("John Lenz <jelenz@students.wisc.edu>");
MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SHARP SL");
