[PATCH v10 14/19] spi: cadence-quadspi: reprogram PHY DLL on runtime resume

Santhosh Kumar K s-k6 at ti.com
Mon Sep 28 23:35:24 PDT 2026


The PHY DLL loses its programmed delay values and lock when the OSPI
controller is power-gated during runtime suspend. On resume,
cqspi_controller_init() reinitialises the controller but does not
touch the PHY DLL registers, leaving the DLL unlocked. Any subsequent
PHY read or write would then fail at the cqspi_resync_dll() call
inside cqspi_tune_phy_read()/cqspi_tune_phy_write(), because
CQSPI_REG_PHY_DLL_MASTER -- a prerequisite for cqspi_resync_dll() to
succeed -- is never reprogrammed after the power cycle.

Restore CQSPI_REG_PHY_DLL_MASTER and confirm the DLL can still lock
once per resume, not once per chip-select: CQSPI_REG_PHY_DLL_MASTER
and CQSPI_REG_PHY_CONFIG are both global, not per-CS, so iterating
over every tuned chip-select to resync its own RX/TX delay taps would
just have each iteration overwrite the last. Instead, mark every
tuned chip-select's DLL as unlocked so cqspi_phy_reprogram_dll()
reprograms its specific taps lazily the next time it is actually used.
If the one-time resync fails, disable PHY tuning for every tuned
chip-select, since the failure reflects the shared DLL mechanism
rather than any one flash's calibration.

Signed-off-by: Santhosh Kumar K <s-k6 at ti.com>
---
 drivers/spi/spi-cadence-quadspi.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 10a393105ca1..e4a06ef02d44 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -4076,7 +4076,7 @@ static int cqspi_runtime_suspend(struct device *dev)
 static int cqspi_runtime_resume(struct device *dev)
 {
 	struct cqspi_st *cqspi = dev_get_drvdata(dev);
-	int ret;
+	int cs, ret;
 
 	ret = clk_bulk_prepare_enable(CLK_QSPI_NUM, cqspi->clks);
 	if (ret)
@@ -4089,6 +4089,31 @@ static int cqspi_runtime_resume(struct device *dev)
 
 	cqspi->current_cs = -1;
 	cqspi->sclk = 0;
+
+	for (cs = 0; cs < CQSPI_MAX_CHIPSELECT; cs++) {
+		if (cqspi->f_pdata[cs].use_tuned_phy)
+			break;
+	}
+	if (cs == CQSPI_MAX_CHIPSELECT)
+		return 0;
+
+	/* PHY_DLL_MASTER and PHY_CONFIG are global; resync once, not per-CS. */
+	cqspi_phy_set_dll_master(cqspi);
+	ret = cqspi_resync_dll(cqspi);
+	if (ret)
+		dev_warn(dev, "PHY DLL resync failed on resume: %d, disabling PHY\n", ret);
+
+	for (; cs < CQSPI_MAX_CHIPSELECT; cs++) {
+		struct cqspi_flash_pdata *f_pdata = &cqspi->f_pdata[cs];
+
+		if (!f_pdata->use_tuned_phy)
+			continue;
+
+		f_pdata->dll_locked = false;
+		if (ret)
+			f_pdata->use_tuned_phy = false;
+	}
+
 	return 0;
 }
 
-- 
2.34.1




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