[PATCH 07/15] mtd: spi-nor: Allow configuring the actual number of dummy cycles

[sashiko-bot at kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] mtd: spi-nor: volatile dummy cycle hardware config lost on resume
--

commit 55807f7f87f4c66c05c4d5c678570e0e6e21c0c9
Author: Miquel Raynal <miquel.raynal at bootlin.com>

mtd: spi-nor: Allow configuring the actual number of dummy cycles

This commit introduces a callback to configure the actual number of dummy
cycles expected by the SPI NOR chip. It ensures that the chip is configured
properly when the number of dummy cycles is maximized for the fastest read
variant advertised by the SFDP tables.

> Crete a callback to configure the chip for expecting a specific number
> of dummy cycles.

[Severity: Low]
This isn't a bug, but there's a typo (Crete) in the commit message.

> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 381bbc13f82ff..f45c2c07d0245 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2636,7 +2636,17 @@ static int spi_nor_setup(struct spi_nor *nor,
>  		return err;
>  	}
>  
> -	return spi_nor_set_addr_nbytes(nor);
> +	err = spi_nor_set_addr_nbytes(nor);
> +	if (err)
> +		return err;
> +
> +	if (nor->params->set_dummy) {
> +		err = nor->params->set_dummy(nor, nor->read_dummy);
> +		if (err)
> +			return err;
> +	}

[Severity: High]
Is the dummy cycle hardware configuration lost during a suspend and resume
cycle?

When a SPI NOR chip loses power during system suspend, its volatile dummy
cycle configuration register is reset to its power-on default.

Upon system resume, spi_nor_resume() calls spi_nor_init() to re-initialize
the volatile state of the chip:

drivers/mtd/spi-nor/core.c:spi_nor_resume() {
	...
	/* re-initialize the nor chip */
	ret = spi_nor_init(nor);
	...
}

However, spi_nor_init() does not restore the dummy cycle configuration using
nor->params->set_dummy().

Since the software state (nor->read_dummy) retains the custom dummy cycle
count while the hardware reverts to the default count, will subsequent reads
be misaligned and lead to data corruption?

> +
> +	return 0;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261002-winbond-master-spi-nor-w35t-v1-0-a22a2f95c26e@bootlin.com?part=7