[PATCH 1/3] mtd: maps: remove AMD Élan specific drivers
Arnd Bergmann
arnd at kernel.org
Tue May 26 03:32:04 PDT 2026
From: Arnd Bergmann <arnd at arndb.de>
There are four MTD maps drivers that are used with AMD Élan SoCs.
Since 486-class CPU support was removed in commit 8b793a92d862 ("x86/cpu:
Remove M486/M486SX/ELAN support"), it is no longer possible to actually
use these, so just remove the drivers entirely.
Signed-off-by: Arnd Bergmann <arnd at arndb.de>
---
drivers/mtd/maps/Kconfig | 40 ---
drivers/mtd/maps/Makefile | 4 -
drivers/mtd/maps/netsc520.c | 127 ---------
drivers/mtd/maps/nettel.c | 462 --------------------------------
drivers/mtd/maps/sc520cdp.c | 294 --------------------
drivers/mtd/maps/ts5500_flash.c | 108 --------
6 files changed, 1035 deletions(-)
delete mode 100644 drivers/mtd/maps/netsc520.c
delete mode 100644 drivers/mtd/maps/nettel.c
delete mode 100644 drivers/mtd/maps/sc520cdp.c
delete mode 100644 drivers/mtd/maps/ts5500_flash.c
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 99d5ff9a1fbe..784dba14e908 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -125,40 +125,6 @@ config MTD_SUN_UFLASH
Sun Microsystems boardsets. This driver will require CFI support
in the kernel, so if you did not enable CFI previously, do that now.
-config MTD_SC520CDP
- tristate "CFI Flash device mapped on AMD SC520 CDP"
- depends on (MELAN || COMPILE_TEST) && MTD_CFI
- help
- The SC520 CDP board has two banks of CFI-compliant chips and one
- Dual-in-line JEDEC chip. This 'mapping' driver supports that
- arrangement, implementing three MTD devices.
-
-config MTD_NETSC520
- tristate "CFI Flash device mapped on AMD NetSc520"
- depends on (MELAN || COMPILE_TEST) && MTD_CFI
- help
- This enables access routines for the flash chips on the AMD NetSc520
- demonstration board. If you have one of these boards and would like
- to use the flash chips on it, say 'Y'.
-
-config MTD_TS5500
- tristate "JEDEC Flash device mapped on Technologic Systems TS-5500"
- depends on TS5500 || COMPILE_TEST
- select MTD_JEDECPROBE
- select MTD_CFI_AMDSTD
- help
- This provides a driver for the on-board flash of the Technologic
- System's TS-5500 board. The 2MB flash is split into 3 partitions
- which are accessed as separate MTD devices.
-
- mtd0 and mtd2 are the two BIOS drives, which use the resident
- flash disk (RFD) flash translation layer.
-
- mtd1 allows you to reprogram your BIOS. BE VERY CAREFUL.
-
- Note that jumper 3 ("Write Enable Drive A") must be set
- otherwise detection won't succeed.
-
config MTD_SBC_GXX
tristate "CFI Flash device mapped on Arcom SBC-GXx boards"
depends on X86 && MTD_CFI_INTELEXT && MTD_COMPLEX_MAPPINGS
@@ -238,12 +204,6 @@ config MTD_TSUNAMI
help
Support for the flash chip on Tsunami TIG bus.
-config MTD_NETtel
- tristate "CFI flash device on SnapGear/SecureEdge"
- depends on X86 && MTD_JEDECPROBE
- help
- Support for flash chips on NETtel/SecureEdge/SnapGear boards.
-
config MTD_LANTIQ
tristate "Lantiq SoC NOR support"
depends on LANTIQ
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 51af1d2ebd52..157f911f86d8 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -26,16 +26,12 @@ obj-$(CONFIG_MTD_PISMO) += pismo.o
obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o
-obj-$(CONFIG_MTD_SC520CDP) += sc520cdp.o
-obj-$(CONFIG_MTD_NETSC520) += netsc520.o
-obj-$(CONFIG_MTD_TS5500) += ts5500_flash.o
obj-$(CONFIG_MTD_SUN_UFLASH) += sun_uflash.o
obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
obj-$(CONFIG_MTD_PCI) += pci.o
obj-$(CONFIG_MTD_IMPA7) += impa7.o
obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
-obj-$(CONFIG_MTD_NETtel) += nettel.o
obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_VMU) += vmu-flash.o
diff --git a/drivers/mtd/maps/netsc520.c b/drivers/mtd/maps/netsc520.c
deleted file mode 100644
index 0bb651624f05..000000000000
--- a/drivers/mtd/maps/netsc520.c
+++ /dev/null
@@ -1,127 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* netsc520.c -- MTD map driver for AMD NetSc520 Demonstration Board
- *
- * Copyright (C) 2001 Mark Langsdorf (mark.langsdorf at amd.com)
- * based on sc520cdp.c by Sysgo Real-Time Solutions GmbH
- *
- * The NetSc520 is a demonstration board for the Elan Sc520 processor available
- * from AMD. It has a single back of 16 megs of 32-bit Flash ROM and another
- * 16 megs of SDRAM.
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/io.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-
-/*
-** The single, 16 megabyte flash bank is divided into four virtual
-** partitions. The first partition is 768 KiB and is intended to
-** store the kernel image loaded by the bootstrap loader. The second
-** partition is 256 KiB and holds the BIOS image. The third
-** partition is 14.5 MiB and is intended for the flash file system
-** image. The last partition is 512 KiB and contains another copy
-** of the BIOS image and the reset vector.
-**
-** Only the third partition should be mounted. The first partition
-** should not be mounted, but it can erased and written to using the
-** MTD character routines. The second and fourth partitions should
-** not be touched - it is possible to corrupt the BIOS image by
-** mounting these partitions, and potentially the board will not be
-** recoverable afterwards.
-*/
-
-/* partition_info gives details on the logical partitions that the split the
- * single flash device into. If the size if zero we use up to the end of the
- * device. */
-static const struct mtd_partition partition_info[] = {
- {
- .name = "NetSc520 boot kernel",
- .offset = 0,
- .size = 0xc0000
- },
- {
- .name = "NetSc520 Low BIOS",
- .offset = 0xc0000,
- .size = 0x40000
- },
- {
- .name = "NetSc520 file system",
- .offset = 0x100000,
- .size = 0xe80000
- },
- {
- .name = "NetSc520 High BIOS",
- .offset = 0xf80000,
- .size = 0x80000
- },
-};
-#define NUM_PARTITIONS ARRAY_SIZE(partition_info)
-
-#define WINDOW_SIZE 0x00100000
-#define WINDOW_ADDR 0x00200000
-
-static struct map_info netsc520_map = {
- .name = "netsc520 Flash Bank",
- .size = WINDOW_SIZE,
- .bankwidth = 4,
- .phys = WINDOW_ADDR,
-};
-
-#define NUM_FLASH_BANKS ARRAY_SIZE(netsc520_map)
-
-static struct mtd_info *mymtd;
-
-static int __init init_netsc520(void)
-{
- printk(KERN_NOTICE "NetSc520 flash device: 0x%Lx at 0x%Lx\n",
- (unsigned long long)netsc520_map.size,
- (unsigned long long)netsc520_map.phys);
- netsc520_map.virt = ioremap(netsc520_map.phys, netsc520_map.size);
-
- if (!netsc520_map.virt) {
- printk("Failed to ioremap\n");
- return -EIO;
- }
-
- simple_map_init(&netsc520_map);
-
- mymtd = do_map_probe("cfi_probe", &netsc520_map);
- if(!mymtd)
- mymtd = do_map_probe("map_ram", &netsc520_map);
- if(!mymtd)
- mymtd = do_map_probe("map_rom", &netsc520_map);
-
- if (!mymtd) {
- iounmap(netsc520_map.virt);
- return -ENXIO;
- }
-
- mymtd->owner = THIS_MODULE;
- mtd_device_register(mymtd, partition_info, NUM_PARTITIONS);
- return 0;
-}
-
-static void __exit cleanup_netsc520(void)
-{
- if (mymtd) {
- mtd_device_unregister(mymtd);
- map_destroy(mymtd);
- }
- if (netsc520_map.virt) {
- iounmap(netsc520_map.virt);
- netsc520_map.virt = NULL;
- }
-}
-
-module_init(init_netsc520);
-module_exit(cleanup_netsc520);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf at amd.com>");
-MODULE_DESCRIPTION("MTD map driver for AMD NetSc520 Demonstration Board");
diff --git a/drivers/mtd/maps/nettel.c b/drivers/mtd/maps/nettel.c
deleted file mode 100644
index 7d349874ffeb..000000000000
--- a/drivers/mtd/maps/nettel.c
+++ /dev/null
@@ -1,462 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/****************************************************************************/
-
-/*
- * nettel.c -- mappings for NETtel/SecureEdge/SnapGear (x86) boards.
- *
- * (C) Copyright 2000-2001, Greg Ungerer (gerg at snapgear.com)
- * (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
- */
-
-/****************************************************************************/
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/cfi.h>
-#include <linux/reboot.h>
-#include <linux/err.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-#include <asm/io.h>
-
-/****************************************************************************/
-
-#define INTEL_BUSWIDTH 1
-#define AMD_WINDOW_MAXSIZE 0x00200000
-#define AMD_BUSWIDTH 1
-
-/*
- * PAR masks and shifts, assuming 64K pages.
- */
-#define SC520_PAR_ADDR_MASK 0x00003fff
-#define SC520_PAR_ADDR_SHIFT 16
-#define SC520_PAR_TO_ADDR(par) \
- (((par)&SC520_PAR_ADDR_MASK) << SC520_PAR_ADDR_SHIFT)
-
-#define SC520_PAR_SIZE_MASK 0x01ffc000
-#define SC520_PAR_SIZE_SHIFT 2
-#define SC520_PAR_TO_SIZE(par) \
- ((((par)&SC520_PAR_SIZE_MASK) << SC520_PAR_SIZE_SHIFT) + (64*1024))
-
-#define SC520_PAR(cs, addr, size) \
- ((cs) | \
- ((((size)-(64*1024)) >> SC520_PAR_SIZE_SHIFT) & SC520_PAR_SIZE_MASK) | \
- (((addr) >> SC520_PAR_ADDR_SHIFT) & SC520_PAR_ADDR_MASK))
-
-#define SC520_PAR_BOOTCS 0x8a000000
-#define SC520_PAR_ROMCS1 0xaa000000
-#define SC520_PAR_ROMCS2 0xca000000 /* Cache disabled, 64K page */
-
-static void *nettel_mmcrp = NULL;
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
-static struct mtd_info *intel_mtd;
-#endif
-static struct mtd_info *amd_mtd;
-
-/****************************************************************************/
-
-/****************************************************************************/
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
-static struct map_info nettel_intel_map = {
- .name = "SnapGear Intel",
- .size = 0,
- .bankwidth = INTEL_BUSWIDTH,
-};
-
-static struct mtd_partition nettel_intel_partitions[] = {
- {
- .name = "SnapGear kernel",
- .offset = 0,
- .size = 0x000e0000
- },
- {
- .name = "SnapGear filesystem",
- .offset = 0x00100000,
- },
- {
- .name = "SnapGear config",
- .offset = 0x000e0000,
- .size = 0x00020000
- },
- {
- .name = "SnapGear Intel",
- .offset = 0
- },
- {
- .name = "SnapGear BIOS Config",
- .offset = 0x007e0000,
- .size = 0x00020000
- },
- {
- .name = "SnapGear BIOS",
- .offset = 0x007e0000,
- .size = 0x00020000
- },
-};
-#endif
-
-static struct map_info nettel_amd_map = {
- .name = "SnapGear AMD",
- .size = AMD_WINDOW_MAXSIZE,
- .bankwidth = AMD_BUSWIDTH,
-};
-
-static const struct mtd_partition nettel_amd_partitions[] = {
- {
- .name = "SnapGear BIOS config",
- .offset = 0x000e0000,
- .size = 0x00010000
- },
- {
- .name = "SnapGear BIOS",
- .offset = 0x000f0000,
- .size = 0x00010000
- },
- {
- .name = "SnapGear AMD",
- .offset = 0
- },
- {
- .name = "SnapGear high BIOS",
- .offset = 0x001f0000,
- .size = 0x00010000
- }
-};
-
-#define NUM_AMD_PARTITIONS ARRAY_SIZE(nettel_amd_partitions)
-
-/****************************************************************************/
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
-
-/*
- * Set the Intel flash back to read mode since some old boot
- * loaders don't.
- */
-static int nettel_reboot_notifier(struct notifier_block *nb, unsigned long val, void *v)
-{
- struct cfi_private *cfi = nettel_intel_map.fldrv_priv;
- unsigned long b;
-
- /* Make sure all FLASH chips are put back into read mode */
- for (b = 0; (b < nettel_intel_partitions[3].size); b += 0x100000) {
- cfi_send_gen_cmd(0xff, 0x55, b, &nettel_intel_map, cfi,
- cfi->device_type, NULL);
- }
- return(NOTIFY_OK);
-}
-
-static struct notifier_block nettel_notifier_block = {
- nettel_reboot_notifier, NULL, 0
-};
-
-#endif
-
-/****************************************************************************/
-
-static int __init nettel_init(void)
-{
- volatile unsigned long *amdpar;
- unsigned long amdaddr, maxsize;
- int num_amd_partitions=0;
-#ifdef CONFIG_MTD_CFI_INTELEXT
- volatile unsigned long *intel0par, *intel1par;
- unsigned long orig_bootcspar, orig_romcs1par;
- unsigned long intel0addr, intel0size;
- unsigned long intel1addr, intel1size;
- int intelboot, intel0cs, intel1cs;
- int num_intel_partitions;
-#endif
- int rc = 0;
-
- nettel_mmcrp = (void *) ioremap(0xfffef000, 4096);
- if (nettel_mmcrp == NULL) {
- printk("SNAPGEAR: failed to disable MMCR cache??\n");
- return(-EIO);
- }
-
- /* Set CPU clock to be 33.000MHz */
- *((unsigned char *) (nettel_mmcrp + 0xc64)) = 0x01;
-
- amdpar = (volatile unsigned long *) (nettel_mmcrp + 0xc4);
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
- intelboot = 0;
- intel0cs = SC520_PAR_ROMCS1;
- intel0par = (volatile unsigned long *) (nettel_mmcrp + 0xc0);
- intel1cs = SC520_PAR_ROMCS2;
- intel1par = (volatile unsigned long *) (nettel_mmcrp + 0xbc);
-
- /*
- * Save the CS settings then ensure ROMCS1 and ROMCS2 are off,
- * otherwise they might clash with where we try to map BOOTCS.
- */
- orig_bootcspar = *amdpar;
- orig_romcs1par = *intel0par;
- *intel0par = 0;
- *intel1par = 0;
-#endif
-
- /*
- * The first thing to do is determine if we have a separate
- * boot FLASH device. Typically this is a small (1 to 2MB)
- * AMD FLASH part. It seems that device size is about the
- * only way to tell if this is the case...
- */
- amdaddr = 0x20000000;
- maxsize = AMD_WINDOW_MAXSIZE;
-
- *amdpar = SC520_PAR(SC520_PAR_BOOTCS, amdaddr, maxsize);
- __asm__ ("wbinvd");
-
- nettel_amd_map.phys = amdaddr;
- nettel_amd_map.virt = ioremap(amdaddr, maxsize);
- if (!nettel_amd_map.virt) {
- printk("SNAPGEAR: failed to ioremap() BOOTCS\n");
- iounmap(nettel_mmcrp);
- return(-EIO);
- }
- simple_map_init(&nettel_amd_map);
-
- if ((amd_mtd = do_map_probe("jedec_probe", &nettel_amd_map))) {
- printk(KERN_NOTICE "SNAPGEAR: AMD flash device size = %dK\n",
- (int)(amd_mtd->size>>10));
-
- amd_mtd->owner = THIS_MODULE;
-
- /* The high BIOS partition is only present for 2MB units */
- num_amd_partitions = NUM_AMD_PARTITIONS;
- if (amd_mtd->size < AMD_WINDOW_MAXSIZE)
- num_amd_partitions--;
- /* Don't add the partition until after the primary INTEL's */
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
- /*
- * Map the Intel flash into memory after the AMD
- * It has to start on a multiple of maxsize.
- */
- maxsize = SC520_PAR_TO_SIZE(orig_romcs1par);
- if (maxsize < (32 * 1024 * 1024))
- maxsize = (32 * 1024 * 1024);
- intel0addr = amdaddr + maxsize;
-#endif
- } else {
-#ifdef CONFIG_MTD_CFI_INTELEXT
- /* INTEL boot FLASH */
- intelboot++;
-
- if (!orig_romcs1par) {
- intel0cs = SC520_PAR_BOOTCS;
- intel0par = (volatile unsigned long *)
- (nettel_mmcrp + 0xc4);
- intel1cs = SC520_PAR_ROMCS1;
- intel1par = (volatile unsigned long *)
- (nettel_mmcrp + 0xc0);
-
- intel0addr = SC520_PAR_TO_ADDR(orig_bootcspar);
- maxsize = SC520_PAR_TO_SIZE(orig_bootcspar);
- } else {
- /* Kernel base is on ROMCS1, not BOOTCS */
- intel0cs = SC520_PAR_ROMCS1;
- intel0par = (volatile unsigned long *)
- (nettel_mmcrp + 0xc0);
- intel1cs = SC520_PAR_BOOTCS;
- intel1par = (volatile unsigned long *)
- (nettel_mmcrp + 0xc4);
-
- intel0addr = SC520_PAR_TO_ADDR(orig_romcs1par);
- maxsize = SC520_PAR_TO_SIZE(orig_romcs1par);
- }
-
- /* Destroy useless AMD MTD mapping */
- amd_mtd = NULL;
- iounmap(nettel_amd_map.virt);
- nettel_amd_map.virt = NULL;
-#else
- /* Only AMD flash supported */
- rc = -ENXIO;
- goto out_unmap2;
-#endif
- }
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
- /*
- * We have determined the INTEL FLASH configuration, so lets
- * go ahead and probe for them now.
- */
-
- /* Set PAR to the maximum size */
- if (maxsize < (32 * 1024 * 1024))
- maxsize = (32 * 1024 * 1024);
- *intel0par = SC520_PAR(intel0cs, intel0addr, maxsize);
-
- /* Turn other PAR off so the first probe doesn't find it */
- *intel1par = 0;
-
- /* Probe for the size of the first Intel flash */
- nettel_intel_map.size = maxsize;
- nettel_intel_map.phys = intel0addr;
- nettel_intel_map.virt = ioremap(intel0addr, maxsize);
- if (!nettel_intel_map.virt) {
- printk("SNAPGEAR: failed to ioremap() ROMCS1\n");
- rc = -EIO;
- goto out_unmap2;
- }
- simple_map_init(&nettel_intel_map);
-
- intel_mtd = do_map_probe("cfi_probe", &nettel_intel_map);
- if (!intel_mtd) {
- rc = -ENXIO;
- goto out_unmap1;
- }
-
- /* Set PAR to the detected size */
- intel0size = intel_mtd->size;
- *intel0par = SC520_PAR(intel0cs, intel0addr, intel0size);
-
- /*
- * Map second Intel FLASH right after first. Set its size to the
- * same maxsize used for the first Intel FLASH.
- */
- intel1addr = intel0addr + intel0size;
- *intel1par = SC520_PAR(intel1cs, intel1addr, maxsize);
- __asm__ ("wbinvd");
-
- maxsize += intel0size;
-
- /* Delete the old map and probe again to do both chips */
- map_destroy(intel_mtd);
- intel_mtd = NULL;
- iounmap(nettel_intel_map.virt);
-
- nettel_intel_map.size = maxsize;
- nettel_intel_map.virt = ioremap(intel0addr, maxsize);
- if (!nettel_intel_map.virt) {
- printk("SNAPGEAR: failed to ioremap() ROMCS1/2\n");
- rc = -EIO;
- goto out_unmap2;
- }
-
- intel_mtd = do_map_probe("cfi_probe", &nettel_intel_map);
- if (! intel_mtd) {
- rc = -ENXIO;
- goto out_unmap1;
- }
-
- intel1size = intel_mtd->size - intel0size;
- if (intel1size > 0) {
- *intel1par = SC520_PAR(intel1cs, intel1addr, intel1size);
- __asm__ ("wbinvd");
- } else {
- *intel1par = 0;
- }
-
- printk(KERN_NOTICE "SNAPGEAR: Intel flash device size = %lldKiB\n",
- (unsigned long long)(intel_mtd->size >> 10));
-
- intel_mtd->owner = THIS_MODULE;
-
- num_intel_partitions = ARRAY_SIZE(nettel_intel_partitions);
-
- if (intelboot) {
- /*
- * Adjust offset and size of last boot partition.
- * Must allow for BIOS region at end of FLASH.
- */
- nettel_intel_partitions[1].size = (intel0size + intel1size) -
- (1024*1024 + intel_mtd->erasesize);
- nettel_intel_partitions[3].size = intel0size + intel1size;
- nettel_intel_partitions[4].offset =
- (intel0size + intel1size) - intel_mtd->erasesize;
- nettel_intel_partitions[4].size = intel_mtd->erasesize;
- nettel_intel_partitions[5].offset =
- nettel_intel_partitions[4].offset;
- nettel_intel_partitions[5].size =
- nettel_intel_partitions[4].size;
- } else {
- /* No BIOS regions when AMD boot */
- num_intel_partitions -= 2;
- }
- rc = mtd_device_register(intel_mtd, nettel_intel_partitions,
- num_intel_partitions);
- if (rc)
- goto out_map_destroy;
-#endif
-
- if (amd_mtd) {
- rc = mtd_device_register(amd_mtd, nettel_amd_partitions,
- num_amd_partitions);
- if (rc)
- goto out_mtd_unreg;
- }
-
-#ifdef CONFIG_MTD_CFI_INTELEXT
- register_reboot_notifier(&nettel_notifier_block);
-#endif
-
- return rc;
-
-out_mtd_unreg:
-#ifdef CONFIG_MTD_CFI_INTELEXT
- mtd_device_unregister(intel_mtd);
-out_map_destroy:
- map_destroy(intel_mtd);
-out_unmap1:
- iounmap(nettel_intel_map.virt);
-#endif
-
-out_unmap2:
- iounmap(nettel_mmcrp);
- iounmap(nettel_amd_map.virt);
-
- return rc;
-}
-
-/****************************************************************************/
-
-static void __exit nettel_cleanup(void)
-{
-#ifdef CONFIG_MTD_CFI_INTELEXT
- unregister_reboot_notifier(&nettel_notifier_block);
-#endif
- if (amd_mtd) {
- mtd_device_unregister(amd_mtd);
- map_destroy(amd_mtd);
- }
- if (nettel_mmcrp) {
- iounmap(nettel_mmcrp);
- nettel_mmcrp = NULL;
- }
- if (nettel_amd_map.virt) {
- iounmap(nettel_amd_map.virt);
- nettel_amd_map.virt = NULL;
- }
-#ifdef CONFIG_MTD_CFI_INTELEXT
- if (intel_mtd) {
- mtd_device_unregister(intel_mtd);
- map_destroy(intel_mtd);
- }
- if (nettel_intel_map.virt) {
- iounmap(nettel_intel_map.virt);
- nettel_intel_map.virt = NULL;
- }
-#endif
-}
-
-/****************************************************************************/
-
-module_init(nettel_init);
-module_exit(nettel_cleanup);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Greg Ungerer <gerg at snapgear.com>");
-MODULE_DESCRIPTION("SnapGear/SecureEdge FLASH support");
-
-/****************************************************************************/
diff --git a/drivers/mtd/maps/sc520cdp.c b/drivers/mtd/maps/sc520cdp.c
deleted file mode 100644
index 8ef7aec634c7..000000000000
--- a/drivers/mtd/maps/sc520cdp.c
+++ /dev/null
@@ -1,294 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* sc520cdp.c -- MTD map driver for AMD SC520 Customer Development Platform
- *
- * Copyright (C) 2001 Sysgo Real-Time Solutions GmbH
- *
- * The SC520CDP is an evaluation board for the Elan SC520 processor available
- * from AMD. It has two banks of 32-bit Flash ROM, each 8 Megabytes in size,
- * and up to 512 KiB of 8-bit DIL Flash ROM.
- * For details see https://www.amd.com/products/epd/desiging/evalboards/18.elansc520/520_cdp_brief/index.html
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/io.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/concat.h>
-
-/*
-** The Embedded Systems BIOS decodes the first FLASH starting at
-** 0x8400000. This is a *terrible* place for it because accessing
-** the flash at this location causes the A22 address line to be high
-** (that's what 0x8400000 binary's ought to be). But this is the highest
-** order address line on the raw flash devices themselves!!
-** This causes the top HALF of the flash to be accessed first. Beyond
-** the physical limits of the flash, the flash chip aliases over (to
-** 0x880000 which causes the bottom half to be accessed. This splits the
-** flash into two and inverts it! If you then try to access this from another
-** program that does NOT do this insanity, then you *will* access the
-** first half of the flash, but not find what you expect there. That
-** stuff is in the *second* half! Similarly, the address used by the
-** BIOS for the second FLASH bank is also quite a bad choice.
-** If REPROGRAM_PAR is defined below (the default), then this driver will
-** choose more useful addresses for the FLASH banks by reprogramming the
-** responsible PARxx registers in the SC520's MMCR region. This will
-** cause the settings to be incompatible with the BIOS's settings, which
-** shouldn't be a problem since you are running Linux, (i.e. the BIOS is
-** not much use anyway). However, if you need to be compatible with
-** the BIOS for some reason, just undefine REPROGRAM_PAR.
-*/
-#define REPROGRAM_PAR
-
-
-
-#ifdef REPROGRAM_PAR
-
-/* These are the addresses we want.. */
-#define WINDOW_ADDR_0 0x08800000
-#define WINDOW_ADDR_1 0x09000000
-#define WINDOW_ADDR_2 0x09800000
-
-/* .. and these are the addresses the BIOS gives us */
-#define WINDOW_ADDR_0_BIOS 0x08400000
-#define WINDOW_ADDR_1_BIOS 0x08c00000
-#define WINDOW_ADDR_2_BIOS 0x09400000
-
-#else
-
-#define WINDOW_ADDR_0 0x08400000
-#define WINDOW_ADDR_1 0x08C00000
-#define WINDOW_ADDR_2 0x09400000
-
-#endif
-
-#define WINDOW_SIZE_0 0x00800000
-#define WINDOW_SIZE_1 0x00800000
-#define WINDOW_SIZE_2 0x00080000
-
-
-static struct map_info sc520cdp_map[] = {
- {
- .name = "SC520CDP Flash Bank #0",
- .size = WINDOW_SIZE_0,
- .bankwidth = 4,
- .phys = WINDOW_ADDR_0
- },
- {
- .name = "SC520CDP Flash Bank #1",
- .size = WINDOW_SIZE_1,
- .bankwidth = 4,
- .phys = WINDOW_ADDR_1
- },
- {
- .name = "SC520CDP DIL Flash",
- .size = WINDOW_SIZE_2,
- .bankwidth = 1,
- .phys = WINDOW_ADDR_2
- },
-};
-
-#define NUM_FLASH_BANKS ARRAY_SIZE(sc520cdp_map)
-
-static struct mtd_info *mymtd[NUM_FLASH_BANKS];
-static struct mtd_info *merged_mtd;
-
-#ifdef REPROGRAM_PAR
-
-/*
-** The SC520 MMCR (memory mapped control register) region resides
-** at 0xFFFEF000. The 16 Programmable Address Region (PAR) registers
-** are at offset 0x88 in the MMCR:
-*/
-#define SC520_MMCR_BASE 0xFFFEF000
-#define SC520_MMCR_EXTENT 0x1000
-#define SC520_PAR(x) ((0x88/sizeof(unsigned long)) + (x))
-#define NUM_SC520_PAR 16 /* total number of PAR registers */
-
-/*
-** The highest three bits in a PAR register determine what target
-** device is controlled by this PAR. Here, only ROMCS? and BOOTCS
-** devices are of interest.
-*/
-#define SC520_PAR_BOOTCS (0x4<<29)
-#define SC520_PAR_ROMCS0 (0x5<<29)
-#define SC520_PAR_ROMCS1 (0x6<<29)
-#define SC520_PAR_TRGDEV (0x7<<29)
-
-/*
-** Bits 28 thru 26 determine some attributes for the
-** region controlled by the PAR. (We only use non-cacheable)
-*/
-#define SC520_PAR_WRPROT (1<<26) /* write protected */
-#define SC520_PAR_NOCACHE (1<<27) /* non-cacheable */
-#define SC520_PAR_NOEXEC (1<<28) /* code execution denied */
-
-
-/*
-** Bit 25 determines the granularity: 4K or 64K
-*/
-#define SC520_PAR_PG_SIZ4 (0<<25)
-#define SC520_PAR_PG_SIZ64 (1<<25)
-
-/*
-** Build a value to be written into a PAR register.
-** We only need ROM entries, 64K page size:
-*/
-#define SC520_PAR_ENTRY(trgdev, address, size) \
- ((trgdev) | SC520_PAR_NOCACHE | SC520_PAR_PG_SIZ64 | \
- (address) >> 16 | (((size) >> 16) - 1) << 14)
-
-struct sc520_par_table
-{
- unsigned long trgdev;
- unsigned long new_par;
- unsigned long default_address;
-};
-
-static const struct sc520_par_table par_table[NUM_FLASH_BANKS] =
-{
- { /* Flash Bank #0: selected by ROMCS0 */
- SC520_PAR_ROMCS0,
- SC520_PAR_ENTRY(SC520_PAR_ROMCS0, WINDOW_ADDR_0, WINDOW_SIZE_0),
- WINDOW_ADDR_0_BIOS
- },
- { /* Flash Bank #1: selected by ROMCS1 */
- SC520_PAR_ROMCS1,
- SC520_PAR_ENTRY(SC520_PAR_ROMCS1, WINDOW_ADDR_1, WINDOW_SIZE_1),
- WINDOW_ADDR_1_BIOS
- },
- { /* DIL (BIOS) Flash: selected by BOOTCS */
- SC520_PAR_BOOTCS,
- SC520_PAR_ENTRY(SC520_PAR_BOOTCS, WINDOW_ADDR_2, WINDOW_SIZE_2),
- WINDOW_ADDR_2_BIOS
- }
-};
-
-
-static void sc520cdp_setup_par(void)
-{
- unsigned long __iomem *mmcr;
- unsigned long mmcr_val;
- int i, j;
-
- /* map in SC520's MMCR area */
- mmcr = ioremap(SC520_MMCR_BASE, SC520_MMCR_EXTENT);
- if(!mmcr) { /* ioremap failed: skip the PAR reprogramming */
- /* force physical address fields to BIOS defaults: */
- for(i = 0; i < NUM_FLASH_BANKS; i++)
- sc520cdp_map[i].phys = par_table[i].default_address;
- return;
- }
-
- /*
- ** Find the PARxx registers that are responsible for activating
- ** ROMCS0, ROMCS1 and BOOTCS. Reprogram each of these with a
- ** new value from the table.
- */
- for(i = 0; i < NUM_FLASH_BANKS; i++) { /* for each par_table entry */
- for(j = 0; j < NUM_SC520_PAR; j++) { /* for each PAR register */
- mmcr_val = readl(&mmcr[SC520_PAR(j)]);
- /* if target device field matches, reprogram the PAR */
- if((mmcr_val & SC520_PAR_TRGDEV) == par_table[i].trgdev)
- {
- writel(par_table[i].new_par, &mmcr[SC520_PAR(j)]);
- break;
- }
- }
- if(j == NUM_SC520_PAR)
- { /* no matching PAR found: try default BIOS address */
- printk(KERN_NOTICE "Could not find PAR responsible for %s\n",
- sc520cdp_map[i].name);
- printk(KERN_NOTICE "Trying default address 0x%lx\n",
- par_table[i].default_address);
- sc520cdp_map[i].phys = par_table[i].default_address;
- }
- }
- iounmap(mmcr);
-}
-#endif
-
-
-static int __init init_sc520cdp(void)
-{
- int i, j, devices_found = 0;
-
-#ifdef REPROGRAM_PAR
- /* reprogram PAR registers so flash appears at the desired addresses */
- sc520cdp_setup_par();
-#endif
-
- for (i = 0; i < NUM_FLASH_BANKS; i++) {
- printk(KERN_NOTICE "SC520 CDP flash device: 0x%Lx at 0x%Lx\n",
- (unsigned long long)sc520cdp_map[i].size,
- (unsigned long long)sc520cdp_map[i].phys);
-
- sc520cdp_map[i].virt = ioremap(sc520cdp_map[i].phys, sc520cdp_map[i].size);
-
- if (!sc520cdp_map[i].virt) {
- printk("Failed to ioremap\n");
- for (j = 0; j < i; j++) {
- if (mymtd[j]) {
- map_destroy(mymtd[j]);
- iounmap(sc520cdp_map[j].virt);
- }
- }
- return -EIO;
- }
-
- simple_map_init(&sc520cdp_map[i]);
-
- mymtd[i] = do_map_probe("cfi_probe", &sc520cdp_map[i]);
- if(!mymtd[i])
- mymtd[i] = do_map_probe("jedec_probe", &sc520cdp_map[i]);
- if(!mymtd[i])
- mymtd[i] = do_map_probe("map_rom", &sc520cdp_map[i]);
-
- if (mymtd[i]) {
- mymtd[i]->owner = THIS_MODULE;
- ++devices_found;
- }
- else {
- iounmap(sc520cdp_map[i].virt);
- }
- }
- if(devices_found >= 2) {
- /* Combine the two flash banks into a single MTD device & register it: */
- merged_mtd = mtd_concat_create(mymtd, 2, "SC520CDP Flash Banks #0 and #1");
- if(merged_mtd)
- mtd_device_register(merged_mtd, NULL, 0);
- }
- if(devices_found == 3) /* register the third (DIL-Flash) device */
- mtd_device_register(mymtd[2], NULL, 0);
- return(devices_found ? 0 : -ENXIO);
-}
-
-static void __exit cleanup_sc520cdp(void)
-{
- int i;
-
- if (merged_mtd) {
- mtd_device_unregister(merged_mtd);
- mtd_concat_destroy(merged_mtd);
- }
- if (mymtd[2])
- mtd_device_unregister(mymtd[2]);
-
- for (i = 0; i < NUM_FLASH_BANKS; i++) {
- if (mymtd[i])
- map_destroy(mymtd[i]);
- if (sc520cdp_map[i].virt) {
- iounmap(sc520cdp_map[i].virt);
- sc520cdp_map[i].virt = NULL;
- }
- }
-}
-
-module_init(init_sc520cdp);
-module_exit(cleanup_sc520cdp);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Sysgo Real-Time Solutions GmbH");
-MODULE_DESCRIPTION("MTD map driver for AMD SC520 Customer Development Platform");
diff --git a/drivers/mtd/maps/ts5500_flash.c b/drivers/mtd/maps/ts5500_flash.c
deleted file mode 100644
index 70d6e865f555..000000000000
--- a/drivers/mtd/maps/ts5500_flash.c
+++ /dev/null
@@ -1,108 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * ts5500_flash.c -- MTD map driver for Technology Systems TS-5500 board
- *
- * Copyright (C) 2004 Sean Young <sean at mess.org>
- *
- * Note:
- * - In order for detection to work, jumper 3 must be set.
- * - Drive A and B use the resident flash disk (RFD) flash translation layer.
- * - If you have created your own jffs file system and the bios overwrites
- * it during boot, try disabling Drive A: and B: in the boot order.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/types.h>
-
-
-#define WINDOW_ADDR 0x09400000
-#define WINDOW_SIZE 0x00200000
-
-static struct map_info ts5500_map = {
- .name = "TS-5500 Flash",
- .size = WINDOW_SIZE,
- .bankwidth = 1,
- .phys = WINDOW_ADDR
-};
-
-static const struct mtd_partition ts5500_partitions[] = {
- {
- .name = "Drive A",
- .offset = 0,
- .size = 0x0e0000
- },
- {
- .name = "BIOS",
- .offset = 0x0e0000,
- .size = 0x020000,
- },
- {
- .name = "Drive B",
- .offset = 0x100000,
- .size = 0x100000
- }
-};
-
-#define NUM_PARTITIONS ARRAY_SIZE(ts5500_partitions)
-
-static struct mtd_info *mymtd;
-
-static int __init init_ts5500_map(void)
-{
- int rc = 0;
-
- ts5500_map.virt = ioremap(ts5500_map.phys, ts5500_map.size);
-
- if (!ts5500_map.virt) {
- printk(KERN_ERR "Failed to ioremap\n");
- rc = -EIO;
- goto err2;
- }
-
- simple_map_init(&ts5500_map);
-
- mymtd = do_map_probe("jedec_probe", &ts5500_map);
- if (!mymtd)
- mymtd = do_map_probe("map_rom", &ts5500_map);
-
- if (!mymtd) {
- rc = -ENXIO;
- goto err1;
- }
-
- mymtd->owner = THIS_MODULE;
- mtd_device_register(mymtd, ts5500_partitions, NUM_PARTITIONS);
-
- return 0;
-
-err1:
- iounmap(ts5500_map.virt);
-err2:
- return rc;
-}
-
-static void __exit cleanup_ts5500_map(void)
-{
- if (mymtd) {
- mtd_device_unregister(mymtd);
- map_destroy(mymtd);
- }
-
- if (ts5500_map.virt) {
- iounmap(ts5500_map.virt);
- ts5500_map.virt = NULL;
- }
-}
-
-module_init(init_ts5500_map);
-module_exit(cleanup_ts5500_map);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Sean Young <sean at mess.org>");
-MODULE_DESCRIPTION("MTD map driver for Technology Systems TS-5500 board");
-
--
2.39.5
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