[PATCH v4 16/27] mtd: spi-nor: Create a local SR cache
Michael Walle
mwalle at kernel.org
Wed May 6 01:51:20 PDT 2026
On Tue May 5, 2026 at 6:14 PM CEST, Pratyush Yadav wrote:
> On Fri, Apr 03 2026, Miquel Raynal wrote:
>
>> In order to be able to generate debugfs output without having to
>> actually reach the flash, create a SPI NOR local cache of the status
>> registers. What matters in our case are all the bits related to sector
>> locking. As such, in order to make it clear that this cache is not
>> intended to be used anywhere else, we zero the irrelevant bits.
>>
>> The cache is initialized once during the early init, and then maintained
>> every time the write protection scheme is updated.
>
> What is the reason for doing so? Do the reads have side effects?
I don't like that a debugfs read will issue a SPI transaction, at
least not these informational files.
If we ever want to access the registers in the flash, we should have
a separate debugfs file/interface.
-michael
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