On Wed, Jan 28 2026, Shiji Yang wrote: > When the chip does not support top/bottom block protect, the tb_mask > must be set to 0, otherwise SR1 bit5 will be unexpectedly modified. > > Signed-off-by: Shiji Yang <yangshiji66 at outlook.com> Applied to spi-nor/next. Thanks! [...] -- Regards, Pratyush Yadav