[PATCH] mtd: spi-nor: macronix: locking support for MX25L6405D

[Shiji Yang]

Macronix MX25L6405D supports locking with four block-protection bits.
The old revision chips only have status register 1. Hence we also have
to clear the 16BIT_SR flag so that the SR1 can be updated correctly.

Co-authored-by: Nick Hainke <vincent at systemli.org>
Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
---
 drivers/mtd/spi-nor/macronix.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -8,6 +8,11 @@
 		   SPI_MEM_OP_NO_DUMMY,				\
 		   SPI_MEM_OP_DATA_OUT(ndata, buf, 0))
 
+static void macronix_no_16bit_sr_default_init(struct spi_nor *nor)
+{
+	nor->flags &= ~SNOR_F_HAS_16BIT_SR;
+}
+
 static int
 mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
 			    const struct sfdp_parameter_header *bfpt_header,
@@ -28,6 +33,10 @@ mx25l25635_post_bfpt_fixups(struct spi_n
 	return 0;
 }
 
+static const struct spi_nor_fixups mx25l64_fixups = {
+	.default_init = macronix_no_16bit_sr_default_init,
+};
+
 static const struct spi_nor_fixups mx25l25635_fixups = {
 	.post_bfpt = mx25l25635_post_bfpt_fixups,
 	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
@@ -66,7 +75,9 @@ static const struct flash_info macronix_
 		.id = SNOR_ID(0xc2, 0x20, 0x17),
 		.name = "mx25l6405d",
 		.size = SZ_8M,
+		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
 		.no_sfdp_flags = SECT_4K,
+		.fixups = &mx25l64_fixups,
 	}, {
 		/* MX25L12805D */
 		.id = SNOR_ID(0xc2, 0x20, 0x18),