[PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support

Michal Simek michal.simek at amd.com
Fri Jan 23 01:54:10 PST 2026


+Amit,

On 1/21/26 16:51, Andrea Scian via B4 Relay wrote:
> From: Andrea Scian <andrea.scian at dave.eu>
> 
> We need to set another couple of fields in ecc structure to allow
> choosing SW ECC instead of HW one, otherwise write operation fail.
> 
> Signed-off-by: Andrea Scian <andrea.scian at dave.eu>
> ---
>   drivers/mtd/nand/raw/pl35x-nand-controller.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> index 11bd90e3f18cb..fcb62b9ec947b 100644
> --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
> +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> @@ -976,6 +976,8 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
>   		fallthrough;
>   	case NAND_ECC_ENGINE_TYPE_NONE:
>   	case NAND_ECC_ENGINE_TYPE_SOFT:
> +		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
> +		chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
>   		break;
>   	case NAND_ECC_ENGINE_TYPE_ON_HOST:
>   		ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
> 

Amit: Can you please test this and review it?

Thanks,
Michal



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