[PATCH] dt-bindings: mtd: cdns,hp-nfc: Add dma-coherent property

[Dinh Nguyen]

On 1/31/26 14:26, Conor Dooley wrote:
> On Sat, Jan 31, 2026 at 11:26:11AM -0600, Dinh Nguyen wrote:
>> From: Khairul Anuar Romli <khairul.anuar.romli at altera.com>
>>
>> The Cadence HP NAND Flash Controller on supports DMA transactions through
>> a coherent interconnect. In previous generations SoC (Stratix10 and Agilex)
>> the interconnect was non-coherent, hence there is no need for dma-coherent
>> property to be presence. In Agilex 5, the architecture has changed. It
>> introduced a coherent interconnect that supports cache-coherent DMA.
>>
>> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli at altera.com>
>> Reviewed-by: Rob Herring (Arm) <robh at kernel.org>
> 
> Why does this v1 have an ack?
> 

I respun this patch based on the mtd tree so that the mtd maintainers 
can take it. I had originally applied it to my tree, but avoid merge 
conflicts, I'm going to submit it through mtd. This patch is the same as 
this[1].

Sorry for any confusion.

Dinh
[1] 
https://lore.kernel.org/linux-devicetree/176488419217.2206248.9983976146883123306.robh@kernel.org/