[PATCH] mtd: spi-nor: spansion: Modify addr_mode_nbytes for DTR mode

Santhosh Kumar K s-k6 at ti.com
Mon Sep 15 00:41:09 PDT 2025


Hello Pratyush and Takahiro,

On 04/09/25 18:43, Santhosh Kumar K wrote:
> The nor->params->addr_mode_nbytes parameter defines the address byte
> count for the current addressing mode. When transitioning between SDR
> and DDR modes, this parameter must be properly updated to maintain the
> correct addressing behavior. So, implement the necessary updates to
> nor->params->addr_mode_nbytes during both DDR mode enablement and
> disablement operations to ensure address byte counts remain consistent
> with the active transfer mode.
> 
> Signed-off-by: Santhosh Kumar K <s-k6 at ti.com>
> ---
> 
> Tested on TI's AM62x SK
> Logs: https://gist.github.com/santhosh21/8d69756bd54605d79086b00850e1083a

We were facing write and erase failures in NOR flashes without this fix.

Failure log:

root at am62xx-evm:~# flash_erase /dev/mtd6 0 0
Erasing 256 Kibyte @ 0 --  0 % complete [   33.078034] spi-nor spi0.0: 
Erase Error occurred
[   33.086178] spi-nor spi0.0: Erase Error occurredock 0 (mtd6)

         error 5 (Input/output error)
flash_erase: error!: /dev/mtd6: MTD Erase entire chip failureTrying one 
by one each sector.
              error 5 (Input/output error)
Erasing 256 Kibyte @ 0 --  0 % complete libmtd: error!: MEMERASE64 ioctl 
failed for eraseblock 0 (mtd6)
         error 5 (Input/output error)
flash_erase: error!: /dev/mtd6: MTD Erase failure
              error 5 (Input/output error)
Erasing 256 Kibyte @ 0 -- 100 % complete
root at am62xx-evm:~#

But, I just bisected and got to know that the
commit b61c35e3404557779ec427c077f7a9f057bb053d
"mtd: spi-nor: spansion: Use nor->addr_nbytes in octal DTR mode in 
RD_ANY_REG_OP"
fixed this issue. My bad!
Lets drop this patch.

Thanks and Regards,
Santhosh.




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