[PATCH v2 3/3] arm64: dts: socfpga: agilex5: Add SMMU nodes
Khairul Anuar Romli
khairul.anuar.romli at altera.com
Sun Oct 12 22:17:38 PDT 2025
Add SMMU nodes for Agilex5. This SMMU nodes is compatible with arm,smmu-v3.
Add IOMMU property to the supported nodes.
- nand-controller
- dma-controller 0 and dma-controller 1
- usb
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng at altera.com>
Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli at altera.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 04e99cd7e74b..a22cf6a211e2 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -272,6 +272,7 @@ nand: nand-controller at 10b80000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
cdns,board-delay-ps = <4830>;
+ iommus = <&smmu 4>;
status = "disabled";
};
@@ -298,6 +299,7 @@ dmac0: dma-controller at 10db0000 {
snps,block-size = <32767 32767 32767 32767>;
snps,priority = <0 1 2 3>;
snps,axi-max-burst-len = <8>;
+ iommus = <&smmu 8>;
};
dmac1: dma-controller at 10dc0000 {
@@ -315,6 +317,7 @@ dmac1: dma-controller at 10dc0000 {
snps,block-size = <32767 32767 32767 32767>;
snps,priority = <0 1 2 3>;
snps,axi-max-burst-len = <8>;
+ iommus = <&smmu 9>;
};
rst: rstmgr at 10d11000 {
@@ -323,6 +326,18 @@ rst: rstmgr at 10d11000 {
#reset-cells = <1>;
};
+ smmu: iommu at 16000000 {
+ compatible = "arm,smmu-v3";
+ reg = <0x16000000 0x30000>;
+ interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq";
+ dma-coherent;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
spi0: spi at 10da4000 {
compatible = "snps,dw-apb-ssi";
reg = <0x10da4000 0x1000>;
@@ -423,6 +438,7 @@ usb0: usb at 10b00000 {
phy-names = "usb2-phy";
resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
+ iommus = <&smmu 6>;
clocks = <&clkmgr AGILEX5_USB2OTG_HCLK>;
clock-names = "otg";
status = "disabled";
--
2.35.3
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